MT90222 Просмотр технического описания (PDF) - Zarlink Semiconductor Inc

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MT90222

T1/E1/J1 Single Chip Transceiver

Zarlink Semiconductor Inc 

MT90222/3/4

Data Sheet

The IMA implementation is divided into hardware and software functions. The MT90222/3/4 implements the

hardware functions. The software functions are implemented by the user or Zarlink IMA Core. The hardware and

software functions are described below. Notice that a number of MT90222/3/4 functions are included to assist in the

collection of statistical information. This information supports the MIB implementation.

1.1 Software Functions

For the MT90222/3/4 to comply with the IMA specification, the following functions must be implemented by

software:

• the transmit and receive Link State Machines (LSM)

• the IMA Group State Machines (GSM)

• the IMA Group Traffic State Machines (GTSM)

• the Operations and Maintenance (OAM) functions

1.1.1 Link State Machines

The software implemented transmit and receive LSMs are independent (i.e., each link has its own LSM). LSMs rely

on various events from: the MT90222/3/4 interface, such as cell errors, excessive delay between-links, etc.; or,

from the T1/E1/J1/DSL framer, such as Loss Of Signal (LOS), Loss Of Frame (LOF), Remote Alarm Indication

(RAI) etc.

On-chip registers are used to generate the ICP cells that communicate the LSM states at the Far End (FE).

1.1.2 IMA Group State Machines

The IMA GSMs and Group Traffic State Machines (GTSM) must be implemented in software. One of each state

machine should be implemented for each IMA Group.

On-chip registers are used to generate the ICP cells that communicate the various states to the FE.

1.1.3 Link Addition, Removal or Restoration

The addition, removal or restoration of a link is controlled by software using the various control registers in the

MT90222/3/4 and in the T1/E1J1/DSL framers. Decisions are based on the MT90222/3/4 and typically

T1/E1/J1/DSL framer status registers.

1.1.4 Interrupts

The MT90222/3/4 provides numerous registers and counters to implement a polling and/or interrupt mechanism for

tracking link and IMA Group status. This traffic in and out information is used by the Management Information Base

(MIB) for each IMA Group.

1.1.5 Signalling and Rate Adjustment

The microprocessor controls the operation of the serial links by providing handshaking between the Far End (FE)

and Near End (NE) including such functions as signaling and loopback controls. Rate adjustment is controlled by:

• adding or removing one or more serial links

• providing feedback to the ATM network for adjusting the ATM traffic.

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Zarlink Semiconductor Inc.

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