PM4354 Просмотр технического описания (PDF) - PMC-Sierra

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PM4354

FOUR CHANNEL COMBINED E1/T1/J1 TRANSCEIVER/FRAMER

PMC-Sierra 

RELEASED

PM4354 COMET-QUAD

DATASHEET

PMC-1990315

ISSUE 6

FOUR CHANNEL COMBINED E1/T1/J1

TRANSCEIVER / FRAMER

• Uses line rate system clock.

• Provides an IEEE P1149.1 (JTAG) compliant test access port (TAP) and controller for boundary scan

test.

• Implemented in a low power 5 V tolerant 2.5/3.3 V CMOS technology.

• Available in a high density 208-pin fine pitch PBGA (17 mm by 17 mm) package.

• Provides a -40°C to +85°C Industrial temperature operating range.

1.1 Receiver section:

• Typical signal recovery of up to -43dB at 1024kHz (E1) and up to -44dB at 772kHz (T1/J1).1

• Guaranteed minimum signal recovery of -32dB at 1024kHz (E1) and -36dB at 772kHz (T1/J1).1

• Recovers clock and data using a digital phase locked loop for high jitter tolerance.

• Frames to ITU-T G.704 basic and CRC-4 multiframe formatted E1 signals. The framing procedures

are consistent ITU-T G.706 specifications.

• Frames to DSX/DS-1 signals in SF and ESF formats.

• Frames to TTC JT-G704 multiframe formatted J1 signals. Supports the alternate CRC-6 calculation

for Japanese applications. Frames in the presence of and detects the “Japanese Yellow” alarm.

• Tolerates more than 0.3 UI peak-to-peak, high frequency jitter as required by AT&T TR 62411 and

Bellcore TR-TSY-000170.

• Detects violations of the ANSI T1.403 12.5% pulse density rule over a moving 192-bit window.

• Provides loss of signal detection as per ITU-T G.775 and ANSI T1.231. Red, Yellow, and AIS alarm

detection and integration are according to ANSI T1.231 specifications.

• Provides programmable in-band loopback activate and deactivate code detection.

• Supports line and path performance monitoring according to AT&T and ANSI specifications.

Accumulators are provided for counting ESF CRC-6 errors, framing bit errors, line code violations and

loss of frame or change of frame alignment events.

• Provides performance monitoring counters sufficiently large as to allow performance monitor counter

polling at a minimum rate of once per second. Optionally, updates the performance monitoring

counters and interrupts the microprocessor once per second, timed to the receive line.

1 Based on actual results using PIC-22 gauge cable emulation. Refer to the COMET-QUAD Evaluator

Board for design recommendations (PMC-1991237).

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC. AND FOR ITS CUSTOMERS’ INTERNAL USE

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