SST89E554 Просмотр технического описания (PDF) - Silicon Storage Technology

Номер в каталоге

Компоненты Описание

производитель

SST89E554

Flash flex 51 MCU

Silicon Storage Technology 

FlashFlex51 MCU

SST89E564 / SST89V564 / SST89E554 / SST89V554

Preliminary Specifications

4. Capacitive loading on Ports 0 & 2 may cause the VOH on ALE and PSEN# to momentarily fall below the VDD - 0.7 specification when

the address bits are stabilizing.

5. Pins of Ports 1, 2 & 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its

maximum value when Vin is approximately 2V.

6. Pin capacitance is characterized but not tested. EA# is 25pF (max).

7. See Figures 10-1, 10-2, 10-3 and 10-4 for test conditions. Minimum VDD for Power Down is 2.0V.

VDD

RST

VDD

VDD

IDD

VDD

P0

EA#

89x564

CLOCK (NC)

SIGNAL

XTAL2

XTAL1

VSS

All other pins disconnected

384 ILL F26.2

FIGURE 10-1: IDD TEST CONDITION,

ACTIVE MODE

CLOCK (NC)

SIGNAL

VDD

VDD

IDD

VDD

P0

RST

EA#

89x564

XTAL2

XTAL1

VSS

All other pins disconnected

384 ILL F24.2

FIGURE 10-2: IDD TEST CONDITION,

IDLE MODE

(NC)

VDD = 2V

VDD

VDD

IDD

VDD

P0

RST

EA#

89x564

XTAL2

XTAL1

VSS

All other pins disconnected

384 ILL F25.2

FIGURE 10-3: IDD TEST CONDITION,

POWER-DOWN MODE

(NC)

VDD = 5V

VDD

VDD

IDD

VDD

P0

RST

EA#

89x564

XTAL2

XTAL1

VSS

All other pins disconnected

384 ILL F33.2

FIGURE 10-4: IDD TEST CONDITION,

STANDBY (STOP CLOCK) MODE

©2001 Silicon Storage Technology, Inc.

50

S71181-03-000 9/01 384

Share Link: