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SST89E554 Просмотр технического описания (PDF) - Silicon Storage Technology

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SST89E554
SST
Silicon Storage Technology SST
SST89E554 Datasheet PDF : 58 Pages
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FlashFlex51 MCU
SST89E564 / SST89V564 / SST89E554 / SST89V554
4.0 FLASH MEMORY PROGRAMMING
Preliminary Specifications
The device internal flash memory can be programmed or
erased using the following two methods:
External Host Mode
In-Application Programming (IAP) Mode
4.1 External Host Programming Mode
External Host Programming Mode allows the user to pro-
gram the flash memory directly without using the CPU.
External Host Mode is entered by forcing PSEN# from a
logic high to a logic low while RST input is being held con-
tinuously high. The device will stay in External Host Mode
as long as RST = 1 and PSEN# = 0.
A Read-ID operation is necessary to “arm” the device in
External Host Mode, and no other External Host Mode com-
mands can be enabled until a Read-ID is performed. In
External Host Mode, the internal flash memory blocks are
accessed through the re-assigned I/O port pins (see Figure
4-1 for details) by an external host, such as a MCU program-
mer, a PCB tester or a PC-controlled development board.
TABLE 4-1: EXTERNAL HOST MODE COMMANDS FOR SST89E564/SST89V564
Operation
PROG#/
P3[5:4]
RST PSEN# ALE EA# P3[7] P3[6] P2[7] P2[6] P0[7:0] P2[5:0] P1[7:0]
Read-ID
Chip-Erase
VIH1
VIL
VIH
VIH
VIL
VIL
VIL
VIL
DO
AH
AL
VIH1
VIL
VIH
VIH
VIL
VIL
VIL
X
X
X
Block-Erase
Sector-Erase
Byte-Program
VIH1
VIL
VIH1
VIL
VIH1
VIL
VIH
VIH
VIH
VIL
VIH
X
X
X
VIH
VIH
VIL
VIH
VIH
X
AH
AL
VIH
VIH
VIH
VIH
VIL
DI
AH
AL
Byte-Verify (Read) VIH1
VIL
Select-Block0
VIH1
VIL
Select-Block1
VIH1
VIL
VIH
VIH
VIH
VIH
VIL
VIL
DO
AH
AL
VIH
VIH
VIl
VIl
VIH
X
55H
X
VIH
VIH
VIl
VIl
VIH
X
A5H
X
Prog-SC0
Prog-SB1
Prog-SB2
VIH1
VIL
VIH1
VIL
VIH1
VIL
VIH
VIH
VIL
VIL
VIH
X
5AH
X
VIH
VIH
VIH
VIH
VIH
X
X
X
VIH
VIL
VIL
VIH
VIH
X
X
X
Prog-SB3
VIH1
VIL
VIH
VIL
VIH
VIL
VIH
X
X
X
T4-1.4 384
Note: Symbol signifies a negative pulse and the command is asserted during the low state of PROG#/ALE input. All other combinations of
the above input pins are invalid and may result in unexpected behaviors.
Note: VIL = Input Low Voltage; VIH = Input High Voltage; VIH1 = Input High Voltage (XTAL, RST); X = Don’t care; AL = Address low order byte;
AH = Address high order byte; DI = Data Input; DO = Data Output
©2001 Silicon Storage Technology, Inc.
24
S71181-03-000 9/01 384

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