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AD61009ARSZRL

Low Power Mixer 3 V Receiver IF Subsystem

Analog Devices 

AD61009

Since there is no band-limiting in the IF strip, the output-

referred noise can be quite high; in a typical application and

at a gain of 75 dB it is about 100 mV rms, making post-IF filtering

desirable. IFOP may be also used as an IF output for driving

an A/D converter, external demodulator, or external AGC

detector. Figure 5 shows methods of matching the optional

second IF filter.

VPOS

AD61009

2RT

RT

IFOP

BPF

2RT

DMIP

a. Biasing DMIP from Power Supply (Assumes BPF AC

Coupled Internally)

AD61009

RT

IFOP

BPF

DMIP

VMID

RT

CBYPASS

b. Biasing DMIP from VMID (Assumes BPF AC Coupled

Internally)

Figure 5. Input and Output Matching of the Optional

Second IF Filter

Gain Scaling and RSSI

The AD61009’s overall gain, expressed in decibels, is linear-

in-dB with respect to the AGC voltage VG at pin GAIN. The

gain of all sections is maximum when VG is zero, and reduces

progressively up to VG = 2.2 V (for VP = 3 V; in general, up to a

limit VP – 0.8 V). The gain of all stages changes in parallel. The

AD61009 features temperature-compensation of the gain scal-

ing. The gain control scaling is proportional to the reference

voltage applied to the pin GREF. When this pin is tied to the

midpoint of the supply (VMID), the scale is nominally 20 mV/

dB (50 dB/V) for VP = 3 V. Under these conditions, the lower

80 dB of gain range (mixer plus IF) corresponds to a control

voltage of 0.4 V ≤ VG ≤ 2.0 V. The final centering of this 1.6 V

range depends on the insertion losses of the IF filters used. More

generally, the gain scaling using these connections is VP/150

(volts per dB), so becomes 33.3 mV/dB (30 dB/V) using a 5 V

supply, with a proportional change in the AGC range, to 0.33 V ≤

VG ≤ 3 V, Table II lists gain control voltages and scale factors

for power supply voltages from 3 V to 5.5 V.

Alternatively, pin GREF can be tied to an external voltage

reference, VR, provided, for example, by an AD1582 (2.5 V)

or AD1580 (1.21 V) voltage reference, to provide supply-

independent gain scaling of VR/75 (volts per dB). Since it uses

the same reference voltage, the numerical input to this DAC

provides an accurate RSSI value in digital form, no longer

requiring the reference voltage to have high absolute accuracy.

I/Q Demodulators

Both demodulators (I and Q) receive their inputs at pin DMIP.

Internally, this single-sided input is actually differential; the

noninverting input is referenced to pin VMID. Each demodula-

tor comprises a full-wave synchronous detector followed by a

2 MHz, two-pole low-pass filter, producing single-sided outputs

at pins IOUT and QOT. Using the I and Q demodulators for

IFs above 12 MHz is precluded by the 1 MHz to 12 MHz

response of the PLL used in the demodulator section. Pin DMIP

requires an external bias source at VP/2; Figure 6 shows sug-

gested methods.

Outputs IOUT and QOUT are centered at VP/2 and can swing

up to ± 1.23 V even at the low supply voltage of 2.85 V. The

conversion gain of the I and Q demodulators is 18 dB (X8),

requiring a maximum input amplitude at DMIP of ± 150 mV

for IFs > 3 MHz.

Table II. AD61009 Gain and Manual Gain Control Voltage vs. Power Supply Voltage

Power Supply

Voltage

(V)

GREF

(= VMID)

(V)

Scale Factor

(dB/V)

3.0

1.5

50.00

3.5

1.75

42.86

4.0

2.0

37.50

4.5

2.25

33.33

5.0

2.5

30.00

5.5

2.75

27.27

NOTE

Maximum gain occurs for gain control voltage = 0 V.

Scale Factor

(mV/dB)

20.00

23.33

26.67

30.00

33.33

36.67

Gain Control

Voltage Input Range

(V)

0.400–2.000

0.467–2.333

0.533–2.667

0.600–3.000

0.667–3.333

0.733–3.667

–16–

REV. 0

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