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VSC7130RC Просмотр технического описания (PDF) - Vitesse Semiconductor

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VSC7130RC Datasheet PDF : 22 Pages
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Data Sheet
VSC7130
VITESSE
SEMICONDUCTOR CORPORATION
Dual Repeater/Retimer
for Fibre Channel and Gigabit Ethernet
Pin #
1
30
37
33
14
12, 29, 38
41, 47
8, 11
21, 24
55, 58
18
15
7, 19, 25 28,
45, 49, 52
59, 62, 64
53, 54, 63
Name
TWO
INT#
TEST0
TEST1
TEST2
VDD
VDDP
VDDA
VSSA
VSS
N/C
Description
BIDIRECTIONAL - TTL: Two-Wire Interface Output. This output enables daisy
chaining of devices on the Two-Wire Interface so that addresses can be assigned in
software. Input for power-up sensing. Output for Two-Wire Interface functions. Open
drain. For Soft Addressing, pull HIGH with a 4.7kW resistor. For Fixed Addressing, pull
LOW with a 4.7kW resistor.
OUTPUT - TTL: This output indicates that an interruptible condition occurred internally.
Open drain, external 4.7kW pull-up required. If not used, pull HIGH.
INPUT - TTL. LOW for factory test, HIGH for normal operation.
Power Supply, 3.3V.
High-Speed Output Power Supply. Pins 8 and 11 are for REFO+/- and may be left
unconnected in order to power down this output buffer. Pins 21 and 24 are for SO+/-. Pins
55 and 58 are for TX+/-
Analog Power Supply, 3.3V for Clock Multiplier PLL. Filter and bypass to VSSA.
Analog Ground
Ground.
Do not connect (these are internally connected.).
G52297-0, Rev 4.0
04/02/01
© VITESSE SEMICONDUCTOR CORPORATION 741 Calle Plano Camarillo, CA 93012
Tel: (800) VITESSE FAX: (805) 987-5896 Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 19

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