VT82C586B Просмотр технического описания (PDF) - Unspecified

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VT82C586B

PCI Integrated Peripheral Controller

Unspecified 

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VT82C586B

Signal Name

MIRQ0 /

APICCS# /

POS (3040F)

MIRQ1 /

KEYLOCK /

IRQ8# (3040F)

MIRQ2 /

MASTER# /

SDDIR (3041A)

Pin No.

90

106

137

On Board Plug and Play

I/O Signal Description

I Multifunction Pin (see PCI Configuration Register Function 0 Rx59[3,0])

O MIRQ0. Steerable interrupt request input for on-board devices.

O APICCS#. Chip select for external IOAPIC chip for symmetric multiprocessor

implementations.

POS. Power-On Suspend Status Output (see Function 0 Rx59 bit-3). This function

was introduced in rev F of the 3040 silicon and is not available in earlier chips.

Rx59[3] Rx59[0] Pin Function

0

0 MIRQ0 (input)

0

1 APICCS# (output)

1

0 -illegal-

1

1 POS (output)

I Multifunction Pin (see PCI Configuration Register Function 0 Rx59[1] & Rx48[4])

I MIRQ1. Steerable interrupt request input for on-board devices.

I KEYLOCK. Keyboard lock input.

IRQ8#. Interrupt input for external RTC. This function was introduced in

revision F of the 3040 silicon and is not available in earlier chips.

Rx48[4]

0

0

1

1

Rx59[1]

0

1

0

1

Pin Function

MIRQ1 (input)

KEYLOCK (input)

-illegal-

IRQ8# (input) (see also Rx5A[2] and table below). With

this setting, Rx57[3:0] must be set to 0 (MIRQ1 routing)

Rx5A[2] Rx48[4] Pin Function

0

0 External RTC - IRQ8# input on pin 104

0

1 External RTC - IRQ8# input on pin 106

1

x Internal RTC - IRQ8# input not required

I Multifunction Pin (see PCI Configuration Register Function 0 Rx59[2] & Rx48[5])

I MIRQ2. Steerable interrupt request input for on-board devices.

O MASTER#. ISA Master Request indicator. This pin also serves as the direction

control for the IDE interface DD / SA transceivers (see SOE#).

SDDIR. This pin may be programmed to serve as a direction control for the IDE

interface DD / SA transceivers (see SOE#) separate from MASTER#. This

function was introduced in revision A of the 3041 silicon and not available in

earlier chips.

Rx48[5]

0

0

1

1

Rx59[2]

0

1

0

1

Pin Function

MASTER# (input)

MIRQ2 (input)

-illegal-

SDDIR (output)

Revision 1.0 May 13, 1997

-9-

Pinouts

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