UPD77110 Просмотр технического описания (PDF) - NEC => Renesas Technology
Номер в каталоге
Компоненты Описание
производитель
UPD77110 Datasheet PDF : 80 Pages
| |||
µPD77110, 77111, 77112
• Host interface
Pin Name
HA1
Pin No.
100-pin
TQFP
80-pin
TQFP
80-pin
FBGA
72
58
B9
HA0
71
57
C8
HCS
HRD
HWR
HRE
HWE
HD0 - HD7
68
69
70
66
67
63 - 56
54
55
56
52
53
49 - 42
D7
D8
C9
E6
D9
E7, F7,
F9, F8,
G8, G9,
G7, H9
I/O
Function
Shared by:
Input Specifies the register to be accessed by HD7
−
through HD0.
• 1: Accesses the host interface status
register (HST).
• 0: Accesses the host transmit data register
(HDT (out)) when read (HRD = 0), and
host receive data register (HDT (in))
when written (HWR = 0).
Input Specifies the register to be accessed by HD7
−
through HD0.
• 1: Accesses bits 15 through 8 of HST, HDT
(in), and HDT (out).
• 0: Accesses bits 7 through 0 of HST, HDT
(in), and HDT (out).
Input Chip select input
−
Input Host read input
−
Input Host write input
−
Output Host read enable output
−
Output Host write enable output
−
I/O 8-bit host data bus
−
(3S)
Remark The pins marked “3S” under the heading “I/O” go into a high-impedance state when the host interface is
not being accessed.
• I/O ports
Pin Name
P0
P1
P2
P3
Pin No.
100-pin
TQFP
80-pin
TQFP
80-pin
FBGA
55
39
J8
54
38
H7
53
37
F6
52
36
J7
I/O
Function
I/O General-purpose I/O port
I/O
I/O
I/O
Shared by:
−
−
PLL0Note
PLL1Note
Note Only the µPD77110. The µPD77111 and 77112 have no multiplexed pins.
16
Data Sheet U12801EJ4V0DS00
Share Link: 