UPD6125A Просмотр технического описания (PDF) - NEC => Renesas Technology

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UPD6125A

4-BIT SINGLE CHIP MICROCONTROLLER FOR REMOTE CONTROL TRANSMISSION

NEC => Renesas Technology 

µPD6125A, 6126A

13. CONTROL REGISTER (P1)

The control register contains of 10 bits. The controllable items are shown in Table 13-1.

Table 13-1. Control Register (P1)

Bit

D9

D8

D7

Name

Test mode

–

0

Set

Value

1

Be sure to reset to 0.

D6

HALT

NOP

OSC

STOP

D5

D.P.

AD 9

D4

D.P.

AD 8

D3

MOD

AD9 =0 AD8 =0

f OSC/8

AD 9 =1 AD 8 =1 fOSC/12

D2

Timer

STOP

RUN

D1

K I/O

IN

OUT

D0

RL A CC

A0 ←

A3

S-IN

D0 .......................... Specifies data to be input to A0 when the accumulator is shifted to the left.

0: A3, 1: S-IN

D1 .......................... Specifies the status of KI/O, as follows:

0: input mode, 1: output mode

D2 .......................... Specifies the status of the timer, as follows:

0: Count stop, 1: Count execution

D3 .......................... Specifies the carrier frequency output from the REM pin.

0: fOSC/8, 1: fOSC/12

D4, D5 ................. Specify the high-order 2 bits of the ROM data pointer.

D6 .......................... Determines what happen to the oscillation circuit when the HALT instruction is executed.

0: Oscillation does not stop

1: Oscillation stops (STOP mode)

D7 .......................... Be sure to reset this bit to 0.

D8, D9 ................. These bits specify test modes. Be sure to reset them to 0.

Remark D0 = D8 = D9 = 0 on reset, and the other bits are undefined.

14

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