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UCB1510DB Просмотр технического описания (PDF) - Philips Electronics

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UCB1510DB
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UCB1510DB Datasheet PDF : 32 Pages
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Philips Semiconductors
UCB1510
AC97 digital modem codec
11.2.7 GPIO Pin Sticky
Table 15: GPIO Pin Sticky Register
Register address: 0x50; default: 0x0000
Bit
D15
D14
D13
Symbol
Bit
D7
D6
D5
Symbol GS7
GS6
GS5
D12
D4
GS4
D11
D3
GS3
D10
D2
GS2
D9
D1
GS1
D8
D0
GS0
The GPIO Pin Sticky register defines GPIO Input Type (0 = Non-Sticky, 1 = Sticky)
when a GPIO pin is configured as input. Sticky is defined as Edge sensitive,
Non-Sticky as Level-sensitive.
GPIO inputs configured as Sticky are cleared by writing a 0 to the corresponding bit
of the GPIO Pin Status register 0x54, and by reset.
Remark: Changing GPIO control registers while a GPIO is sticky may cause
unwanted interrupts and should be done carefully.
11.2.8 GPIO Wake-up Mask
Table 16: GPIO Wake-up Mask Register
Register address: 0x52; default: 0x0000
Bit
D15
D14
D13
D12
Symbol
Bit
D7
D6
D5
D4
Symbol GW7 GW6 GW5 GW4
D11
D3
GW3
D10
D2
GW2
D9
D1
GW1
D8
D0
GW0
The GPIO Pin Wake-up Mask register provides a mask for determining if an input
GPIO change will generate a wake-up or GPIO_INT (0 = No, 1 = Yes).
When the AC-link is powered down, a wake-up event will trigger the assertion of
SDIN. When the AC-link is powered up, a wake-up event will appear as
GPIO_INT = 1 on bit 0 of input slot 12.
11.2.9 GPIO Pin Status
Table 17: GPIO Pin Status Register
Register address: 0x54; default: N/A
Bit
D15
D14
D13
D12
D11
D10
D9
D8
Symbol
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Symbol GI7
GI6
GI5
GI4
GI3
GI2
GI1
GI0
9397 750 06856
Preliminary specification
The GPIO Status register reflects the state of all GPIO pins (inputs and outputs) on
slot 12.
When the GPIO is an output pin, the value set on slot #12 is transmitted directly to the
pin. When the GPIO pin is a non-sticky input, the status of the pin is accessible in
read mode. When the GPIO is a sticky Input, a transition, either from high to low
(polarity = 0) or from low-to-high (polarity = 1), will assert the corresponding GI bit
to 1. The GI bit will remain asserted until it is cleared by a write of 0.
Rev. 01 — 4 February 2000
© Philips Electronics N.V. 2000. All rights reserved.
12 of 32

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