7025ERPQI45 Просмотр технического описания (PDF) - MAXWELL TECHNOLOGIES

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7025ERPQI45

(8K x 16-Bit) Dual Port RAM High-Speed CMOS

MAXWELL TECHNOLOGIES 

(8K x 16-Bit) Dual Port RAM High-Speed CMOS

RIGHT ADDRESS VALID FIRST

7025E

1. CSL = CSR = VIL.

FIGURE 11. WAVEFORM OF INTERRUPT TIMING 1

SET ADDRESS

CLEAR ADDRESS

1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite

from “A”.

2. See interrupt truth table.

3. Timing depends on which enable signal is asserted last.

4. Timing depends on which enable signal is de-asserted first.

1000586

12.19.01 Rev 2

All data sheets are subject to change without notice 15

©2001 Maxwell Technologies

All rights reserved.

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