SAA3323 Просмотр технического описания (PDF) - Philips Electronics
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Компоненты Описание
производитель
SAA3323 Datasheet PDF : 56 Pages
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Philips Semiconductors
Drive processor for DCC systems
Preliminary specification
SAA3323
PINNING
SYMBOL
SBWS
SBCL
SBDA
SBDIR
SBMCLK
URDA
L3MODE
L3CLK
L3DATA
L3INT
VDD1
VSS1
L3REF
RESET
SLEEP
CLK24
AZCHK
MCLK
TEST3
ERCOSTAT
OEN
A10/RAS
VDD2
VSS2
D7
D6
D5
D4
D3
D2
D1
VDD7
VSS7
D0
A0
A1
A2
A3
PIN
QFP80 TQFP80
DESCRIPTION
1
79 word select for sub-band PASC interface
2
80 bit clock for sub-band PASC interface
3
1
data line for sub-band PASC interface
4
2
direction line for sub-band PASC interface
5
3
master clock for sub-band PASC interface
6
4
unreliable data
7
5
mode line for L3 interface
8
6
bit clock line for L3 interface
9
7
serial data line for L3 interface
10
8
L3 interrupt output
11
9
digital supply voltage
12
10 digital ground
13
11 L3 bus timing reference
14
12 reset SAA3323
15
13 sleep mode selection of SAA3323
16
14 24.576 MHz clock input
17
15 channel 0 and channel 7 azimuth monitor
18
16 6.144 MHz clock output
19
17 TEST3 output; do not connect
20
18 ERCO status, for symbol error rate measurements
21
19 output enable for RAM
22
20 address SRAM; RAS DRAM
23
21 digital supply voltage
24
22 digital ground
25
23 data SRAM
26
24 data SRAM
27
25 data SRAM
28
26 data SRAM
29
27 data SRAM; data DRAM
30
28 data SRAM; data DRAM
31
29 data SRAM; data DRAM
32
30 digital supply voltage for RAM
33
31 digital ground for RAM
34
32 data SRAM; data DRAM
35
33 address SRAM; address DRAM
36
34 address SRAM; address DRAM
37
35 address SRAM; address DRAM
38
36 address SRAM; address DRAM
May 1994
4
TYPE(1)
I/O (1 mA)
I/O (1 mA)
I/O (1 mA)
O (1 mA)
I
O (1 mA)
I
I
I/O (2 mA)
O (1 mA)
S
S
O (1 mA)
I
I
I
O (1 mA)
O (1 mA)
O (1 mA)
O (1 mA)
O (2 mA)
O (2 mA)
S
S
I/O (4 mA)
I/O (4 mA)
I/O (4 mA)
I/O (4 mA)
I/O (4 mA)
I/O (4 mA)
I/O (4 mA)
S
S
I/O (4 mA)
O (2 mA)
O (2 mA)
O (2 mA)
O (2 mA)
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