DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

PM4388 Просмотр технического описания (PDF) - PMC-Sierra

Номер в каталоге
Компоненты Описание
производитель
PM4388
PMC-Sierra
PMC-Sierra PMC-Sierra
PM4388 Datasheet PDF : 284 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
DATA SHEET
PMC-960840
ISSUE 5
PM4388 TOCTL
OCTAL T1 FRAMER
LIST OF FIGURES
FIGURE 1 - HIGH DENSITY CHANNELIZED PORT CARD.............................. 5
FIGURE 2 - CLOCK MASTER: FULL DS1....................................................... 25
FIGURE 3 - CLOCK MASTER: NXDS0 ........................................................... 26
FIGURE 4 - CLOCK SLAVE: ICLK REFERENCE............................................ 26
FIGURE 5 - CLOCK SLAVE: EXTERNAL SIGNALING ................................... 27
FIGURE 6 - DJAT JITTER TOLERANCE ......................................................... 33
FIGURE 7 - DJAT MINIMUM JITTER TOLERANCE VS. XCLK ACCURACY ... 34
FIGURE 8 - DJAT JITTER TRANSFER............................................................ 34
FIGURE 9 - CLOCK MASTER: FULL DS1....................................................... 35
FIGURE 10- CLOCK MASTER: NXDS0 ........................................................... 36
FIGURE 11- CLOCK SLAVE: EFP ENABLED .................................................. 36
FIGURE 12- CLOCK SLAVE: EXTERNAL SIGNALING.................................... 37
FIGURE 13- TRANSMIT TIMING OPTIONS ..................................................... 65
FIGURE 14- INGRESS INTERFACE CLOCK MASTER: NXDS0 MODE........ 200
FIGURE 15- EGRESS INTERFACE CLOCK MASTER: NXDS0 MODE ......... 200
FIGURE 16- INGRESS INTERFACE CLOCK MASTER : FULL DS1 MODE .. 201
FIGURE 17- EGRESS INTERFACE : 1.544 MHZ CLOCK MASTER: FULL DS1
MODE................................................................................................... 201
FIGURE 18- INGRESS INTERFACE: 1.544MHZ CLOCK SLAVE MODES .... 202
FIGURE 19- EGRESS INTERFACE : 1.544 MHZ CLOCK SLAVE: EFP
ENABLED MODE ................................................................................. 202
FIGURE 20- EGRESS INTERFACE : 1.544 MHZ CLOCK SLAVE: EXTERNAL
SIGNALING MODE .............................................................................. 203
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
xi

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]