P2041A-08SR Просмотр технического описания (PDF) - Alliance Semiconductor
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P2041A-08SR Datasheet PDF : 9 Pages
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November 2003
rev F
Pin Configuration
P2041A
Pin Description
Pin# Pin Name
1 XIN/CLK
2 XOUT
3 SR1
4 VSS
SSON
5
6 ModOUT
7 SR0
8 VDD
Type
I
I
I
P
I
O
I
P
Description
Connect to crystal or externally generated clock signal.
Connect to crystal. No connect if externally generated clock signal is used.
Digital logic input used to select Spreading Range (see Table 1). This pin
has an internal pull-up resistor.
Ground Connection. Connect to system ground.
Digital logic input used to enable Spread Spectrum function (Active Low).
Spread Spectrum function enable when low. This pin has an internal pull-
low resistor.
Spread Spectrum Clock Output.
Digital logic input used to select Spreading Range (see Table 1). This pin
has an internal pull-up resistor.
Connect to +3.3V or +5.0V
Table 1 - Spread Range Selection
FS0 SR0 Spreading Range Input Frequency
0
0
0
1
1
0
1
1
+/- 1.50%
+/- 2.50%
+/- 0.50%
+/- 1.00%
(Fin/40)*34.72 KHz
(Fin/40)*34.72 KHz
(Fin/40)*34.72 KHz**
(Fin/40)*34.72 KHz**
Modulation rate
0
0
1
1
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Notice: The information in this document is subject to change without notice.
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