OM4068 Просмотр технического описания (PDF) - Philips Electronics

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производитель

OM4068

LCD driver for low multiplex rates

Philips Electronics 

Philips Semiconductors

LCD driver for low multiplex rates

Product specification

OM4068

AC CHARACTERISTICS

VDD = 2.5 to 5.5 V; VSS = 0 V; VLCD = 5.0 V; Tamb = −40 to +105 °C; unless otherwise specified.

SYMBOL

PARAMETER

ffr(LCD)

fosc

LCD frame frequency (internal clock)

oscillator frequency (not available at any pin)

Bus timing characteristics: serial bus interface; note 1

fSCLK

SCLK clock frequency

tSCLKL

SCLK clock LOW period

tSCLKH

SCLK clock HIGH period

tsu(D)

data set-up time

th(D)

data hold time

tr

SCLK, SDIN rise time

tf

SCLK, SDIN fall time

tsu(en)(SDEH-SCLKH) enable set-up time (SDE HIGH to SCLK HIGH)

tsu(dis)(SCLKL-SDEL) disable set-up time (SCLK LOW to SDE LOW)

tPHL(SDOUT)

SDOUT HIGH-to-LOW propagation delay

MIN.

50

116

TYP.

84

224

MAX.

175

405

UNIT

Hz

kHz

0

−

190

−

190

−

100

−

100

−

−

10

−

10

250

−

250

−

100

−

2.1

MHz

−

ns

−

ns

−

ns

−

ns

−

ns

−

ns

−

ns

−

ns

−

ns

Note

1. All timing values are valid within the operating supply voltage and ambient temperature range and are referenced to

VIL and VIH with an input voltage swing of VSS to VDD.

handbook, full pagewidth

SDOUT

SCLK

SDIN

SCE

tSCLKH tSCLKL

th(D)

tsu(D)

tsu(en)(SDEH-SCLKH)

tPHL(SDOUT)

tr

tf

tsu(dis)(SCLKL-SDEL)

MBK824

1998 Jun 18

Fig.11 Serial data timing.

19

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