MT90820 Просмотр технического описания (PDF) - Mitel Networks

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Компоненты Описание

производитель

MT90820

CMOS ST-BUS™ FAMILY Large Digital Switch (LDX)

Mitel Networks 

Advance Information

CMOS MT90820

Pin Description

Pin #

84 100

Name

Description

1, 11, 31,

30, 54 41,

VSS

Ground.

64, 75 56,

66,

76, 99

2, 32, 5, 40,

VDD

+5 Volt Power Supply.

63 67

3 - 10 68-75 STo8 - 15 Data Stream Output 8 to 15: Serial data Output stream. These stream may

have data rates of 2.048, 4.096 or 8.192 Mb/s.

12 - 81-96 STi0 - 15 Data Stream Input 0 to 15: Serial data input stream. These stream may have

27

data rates of 2.048, 4.096 or 8.192.

28 97

FRM

Frame Pulse (input): This input accepts and automatically identifies frame

synchronization signals formatted according to ST-BUS and GCI interface

specifications, when HMVIP pin =0.

When HMVIP pin =1, FRM input accepts a negative frame pulse which conforms

to HMVIP formats.

29 98 FE/HCLK Frame Measurement input, when HMVIP pin = 0.

4.096MHz Clock input, when HMVIP pin = 1.

31 100

CLK Clock (input): Serial clock for shifting data in/out on the serial stream.

33

6

TMS When 1, enable test mode for production testing.

34

7

TDI Test Data Input.

35

8

TDO Test Data Output.

36

9

TCK Test Clock input.

37 10 TRSTB Test Reset Input: When 0, resets the test circuit.

38 11

IC

Internal Connection: keep at 0 for normal operation.

39 12 RESETB Device Reset Input: When 0, resets the device.

40 13 HMVIP HMVIP mode input. When 1, enables HMVIP interface.

When 0, the device operates in ST-BUS/GCI mode.

41 - 14-21 A0 - A7 Address 0 - 7(Input): When non-multiplexed CPU bus is selected, these lines

48

provide the A0 - A7 address lines to internal memories.

49 22 DS/RD Data Strobe/Read (input): When non-multiplexed CPU bus or Motorola

multiplexed bus are selected, this input is DS. This active high input works in

conjunction with CSB to enable read and write operation.

For Intel multiplexed bus, this input is RDB. This active low input sets the data bus

lines (AD0-AD7, D8-D15) as outputs.

50 23 R/W\WR Read/Write \ Write (Input): In case of non-multiplexed and Motorola multiplexed

buses, this input is Read/Write. This input controls the direction of the data bus

lines (AD0 - AD7, D8-D15) during a microprocessor access.

51 24

CS

Chip Select (Input): Active low input enabling a microprocessor access of the

device.

2-181

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