M68HC11ERG Просмотр технического описания (PDF) - Motorola => Freescale

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M68HC11ERG

M68HC11E Series Programming Reference Guide

Motorola => Freescale 

M68HC11ERG/AD

Table 1. Instruction Set (Sheet 8 of 8)

Mnemonic

Operation

Description

Addressing

Mode

Instruction

Condition Codes

Opcode Operand Cycles S X H I N Z V C

TSY

Transfer Stack

SP + 1 ⇒ IY

Pointer to Y

INH

18

30

—

4

————————

TXS

Transfer X to

IX – 1 ⇒ SP

INH

Stack Pointer

35

—

3

————————

TYS

Transfer Y to

IY – 1 ⇒ SP

Stack Pointer

INH

18

35

—

4

————————

WAI

Wait for

Stack Regs & WAIT

INH

Interrupt

3E

—

**

————————

XGDX

Exchange D

IX ⇒ D, D ⇒ IX

INH

with X

8F

—

3

————————

XGDY

Exchange D

with Y

IY ⇒ D, D ⇒ IY

INH

18

8F

—

4

————————

Cycle

*

**

Infinity or until reset occurs

12 cycles are used beginning with the opcode fetch. A wait state is entered which remains in effect for an integer number of MPU E-clock

cycles (n) until an interrupt is recognized. Finally, two additional cycles are used to fetch the appropriate interrupt vector (14 + n total).

Operands

dd

= 8-bit direct address ($0000–$00FF) (high byte assumed to be $00)

ff

= 8-bit positive offset $00 (0) to $FF (255) (is added to index)

hh

= High-order byte of 16-bit extended address

ii

= One byte of immediate data

jj

= High-order byte of 16-bit immediate data

kk

= Low-order byte of 16-bit immediate data

ll

= Low-order byte of 16-bit extended address

mm = 8-bit mask (set bits to be affected)

rr

= Signed relative offset $80 (–128) to $7F (+127)

(offset relative to address following machine code offset byte))

Operators

()

Contents of register shown inside parentheses

⇐

Is transferred to

⇑

Is pulled from stack

⇓

Is pushed onto stack

•

Boolean AND

+

Arithmetic addition symbol except where used as inclusive-OR symbol

in Boolean formula

⊕

Exclusive-OR

∗

Multiply

:

Concatenation

–

Arithmetic subtraction symbol or negation symbol (two’s complement)

Condition Codes

—

Bit not changed

0

Bit always cleared

1

Bit always set

∆

Bit cleared or set, depending on operation

↓

Bit can be cleared, cannot become set

20

M68HC11E Series Programming Reference Guide

MOTOROLA

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