M68HC11ERG Просмотр технического описания (PDF) - Motorola => Freescale

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M68HC11ERG

M68HC11E Series Programming Reference Guide

Motorola => Freescale 

M68HC11ERG/AD

Instruction Set

Table 1. Instruction Set (Sheet 7 of 8)

Mnemonic

Operation

Description

Addressing

Mode

Instruction

Condition Codes

Opcode Operand Cycles S X H I N Z V C

STAA (opr)

Store

Accumulator

A

A⇒M

A

DIR

97 dd

A

EXT

B7 hh ll

A

IND,X

A7 ff

A

IND,Y 18

A7 ff

3

———— ∆ ∆ 0 —

4

4

5

STAB (opr)

Store

Accumulator

B

B⇒M

B

DIR

D7 dd

B

EXT

F7 hh ll

B

IND,X

E7 ff

B

IND,Y 18

E7 ff

3

———— ∆ ∆ 0 —

4

4

5

STD (opr)

Store

Accumulator

D

A ⇒ M, B ⇒ M + 1

DIR

EXT

IND,X

IND,Y 18

DD dd

FD hh ll

ED ff

ED ff

4

———— ∆ ∆ 0 —

5

5

6

STOP

Stop Internal

—

Clocks

INH

CF

—

2

————————

STS (opr)

Store Stack

Pointer

SP ⇒ M : M + 1

DIR

EXT

IND,X

IND,Y 18

9F dd

BF hh ll

AF ff

AF ff

4

———— ∆ ∆ 0 —

5

5

6

STX (opr)

Store Index

Register X

IX ⇒ M : M + 1

DIR

DF dd

EXT

FF hh ll

IND,X

EF ff

IND,Y CD EF ff

4

———— ∆ ∆ 0 —

5

5

6

STY (opr)

Store Index

Register Y

IY ⇒ M : M + 1

DIR

18

EXT

18

IND,X 1A

IND,Y 18

DF dd

FF hh ll

EF ff

EF ff

5

———— ∆ ∆ 0 —

6

6

6

SUBA (opr)

Subtract

Memory from

A

A–M⇒A

A

IMM

80 ii

A

DIR

90 dd

A

EXT

B0 hh ll

A

IND,X

A0 ff

A

IND,Y 18

A0 ff

2

———— ∆ ∆ ∆ ∆

3

4

4

5

SUBB (opr)

Subtract

Memory from

B

B–M⇒B

A

IMM

C0 ii

A

DIR

D0 dd

A

EXT

F0 hh ll

A

IND,X

E0 ff

A

IND,Y 18

E0 ff

2

———— ∆ ∆ ∆ ∆

3

4

4

5

SUBD (opr)

Subtract

Memory from

D

D–M:M+1⇒D

IMM

DIR

EXT

IND,X

IND,Y 18

83 jj kk

93 dd

B3 hh ll

A3 ff

A3 ff

4

———— ∆ ∆ ∆ ∆

5

6

6

7

SWI

Software

See Figure 3–2

INH

Interrupt

3F

—

14 — — — 1 — — — —

TAB

Transfer A to B

A⇒B

INH

16

—

2

———— ∆ ∆ 0 —

TAP

Transfer A to

A ⇒ CCR

INH

06

—

2

∆↓∆∆∆∆∆∆

CC Register

TBA

Transfer B to A

B⇒A

INH

17

—

2

———— ∆ ∆ 0 —

TEST

TEST (Only in Address Bus Counts

INH

Test Modes)

00

—

*

————————

TPA

Transfer CC

CCR ⇒ A

INH

07

—

2

————————

Register to A

TST (opr) Test for Zero or

Minus

M–0

EXT

IND,X

IND,Y 18

7D hh ll

6D ff

6D ff

6

———— ∆ ∆ 0 0

6

7

TSTA

Test A for Zero

or Minus

A–0

A

INH

4D

—

2

———— ∆ ∆ 0 0

TSTB

Test B for Zero

or Minus

B–0

B

INH

5D

—

2

———— ∆ ∆ 0 0

TSX

Transfer Stack

SP + 1 ⇒ IX

INH

Pointer to X

30

—

3

————————

MOTOROLA

M68HC11E Series Programming Reference Guide

19

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