MAX1881 Просмотр технического описания (PDF) - Maxim Integrated
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MAX1881 Datasheet PDF : 38 Pages
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Quad-Output TFT LCD DC-DC
Converters with Buffer
Pin Description
PIN
MAX1778 MAX1880 MAX1883
MAX1881 MAX1882 MAX1884
MAX1885
1
1
1
1
NAME
FB
FUNCTION
Main Step-Up Regulator Feedback Input. Regulates to 1.25V
nominal. Connect a resistive divider from the output (VMAIN) to FB
to analog ground (GND).
Main Step-Up Integrator Output. When using the integrator,
2
2
2
2
INTG connect 1000pF to analog ground (GND). To disable the
integrator, connect INTG to REF.
Main Supply Voltage. The supply voltage powers the control
3
3
3
3
IN
circuitry for all of the regulators and may range from 2.7V to 5.5V.
Bypass with a 0.1µF capacitor between IN and GND, as close to
the pins as possible.
VCOM Buffer (Operational Transconductance Amplifier) Positive
4
4
4
4
BUF+
Feedback Input. Connect to GND to select the internal resistive
divider that sets the positive input to half the amplifier’s supply
voltage (VBUF+ = V SUPB /2).
5
5
5
5
BUF- VCOM Buffer (Operational Transconductance Amplifier) Negative
Feedback Input
VCOM Buffer (Operational Transconductance Amplifier) Supply
6
6
6
6
SUPB Voltage
7
7
7
7
BUFOUT VCOM Buffer (Operational Transconductance Amplifier) Output
8
8
8
8
GND
Analog Ground. Connect to power ground (PGND) underneath the
IC.
Internal Reference Bypass Terminal. Connect a 0.22µF ceramic
9
9
9
9
REF
capacitor from REF to analog ground (GND). External load
capability up to 50µA.
10
10
−
Positive Charge-Pump Regulator Feedback Input. Regulates to
−
FBP
1.25V nominal. Connect a resistive divider from the positive
charge-pump output (VPOS) to FBP to analog ground (GND).
11
11
−
Negative Charge-Pump Regulator Feedback Input. Regulates to
−
FBN
0V nominal. Connect a resistive divider from the negative charge-
pump output (VNEG) to FBN to the reference (REF).
Active-Low Shutdown Control Input. Pull SHDN low to force the
12
12
10
10
SHDN controller into shutdown. If unused, connect SHDN to IN for normal
operation. A rising edge on SHDN clears the fault latch.
Low-Dropout Linear Regulator Input Voltage. Can range from 4.5V
13
−
11
−
SUPL
to 15V. Bypass with a 1µF capacitor to GND (see Capacitor
Selection and Regulator Stability). Connect both input pins
together externally.
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