MAX1881 Просмотр технического описания (PDF) - Maxim Integrated

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MAX1881

Quad-Output TFT LCD DC-DC Converters with Buffer

Maxim Integrated 

Quad-Output TFT LCD DC-DC

Converters with Buffer

The switching waveforms will appear noisy and asyn-

chronous when light loading causes pulse-skipping

operation; this is a normal operating condition that

improves light-load efficiency.

TIME

tON

tOFF

IPEAK

ILOAD

Figure 3. Discontinuous-to-Continuous Conduction Crossover

Point

Dual Charge-Pump Regulator (MAX1778/

MAX1880/MAX1881/MAX1882 Only)

The MAX1778/MAX1880/MAX1881/MAX1882 con-

trollers contain two independent low-power charge

pumps (Figure 4). One charge pump inverts the input

voltage and provides a regulated negative output volt-

age. The second charge pump doubles the input volt-

age and provides a regulated positive output voltage.

The controllers contain internal P-channel and N-chan-

nel MOSFETs to control the power transfer. The

internal MOSFETs switch at a constant frequency

(fCHP = fOSC/2).

Positive Charge Pump

During the first half-cycle, the N-channel MOSFET turns

on and charges flying capacitor CX(POS) (Figure 4).

This initial charge is controlled by the variable N-chan-

nel on-resistance. During the second half-cycle, the N-

channel MOSFET turns off and the P-channel MOSFET

turns on, level shifting CX(POS) by VSUPP volts. This

connects CX(POS) in parallel with the reservoir capaci-

tor COUT(POS). If the voltage across COUT(POS) plus a

diode drop (VPOS + VDIODE) is smaller than the level-

shifted flying capacitor voltage (VCX(POS) + VSUPP),

charge flows from CX(POS) to COUT(POS) until the diode

(D3) turns off.

VSUPP

2.7V TO 13V

VSUPD

SUPP

D2 CX(POS)

D3

DRVP

MAX1778

MAX1880

MAX1881

MAX1882

OSC

SUPN

CX(NEG) D4

DRVN

D5

VSUPN

2.7V TO 13V

VPOS

R3

COUT(POS)

R4

( ) VPOS =

1 + R3

R4

VREF

VREF = 1.25V

FBP

VREF

1.25V

GND

FBN

REF

PGND

R5

R6

VNEG

COUT(NEG)

CREF

0.22µF

( ) VNEG =

-

R5

R6

VREF

VREF = 1.25V

Figure 4. Low-Power Charge Pump Block Diagram

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