IS61C64AL Просмотр технического описания (PDF) - Integrated Silicon Solution

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IS61C64AL

8K x 8 HIGH-SPEED CMOS STATIC RAM

Integrated Silicon Solution 

IS61C64AL

ISSI ®

READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)

Symbol

Parameter

-10 ns

-12 ns

Min. Max

Min. Max.

Unit

1

tRC

Read Cycle Time

10 —

12 —

ns

tAA

Address Access Time

tOHA

Output Hold Time

— 10

— 12

ns

2—

2—

ns

2

tACS

CE Access Time

— 10

— 12

ns

tDOE

tLZOE(2)

OE Access Time

OE to Low-Z Output

—6

—6

ns

0—

0—

ns

3

tHZOE(2)

OE to High-Z Output

—5

—6

ns

tLZCS(2)

tHZCS(2)

CE to Low-Z Output

CE to High-Z Output

2—

3—

ns

—5

—7

ns

4

tPU(3)

CE to Power-Up

0—

0—

ns

tPD(3)

CE to Power-Down

— 10

— 12

ns

5

Notes:

1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V

and output loading specified in Figure 1.

2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

3. Not 100% tested.

6

AC TEST CONDITIONS

Parameter

Input Pulse Level

Input Rise and Fall Times

Input and Output Timing

and Reference Levels

Output Load

Unit

0V to 3.0V

3 ns

1.5V

See Figures 1 and 2

AC TEST LOADS

5V

480 Ω

OUTPUT

30 pF

Including

jig and

scope

Figure 1

255 Ω

7

8

9

10

480 Ω

5V

OUTPUT

11

5 pF

Including

jig and

scope

255 Ω

12

Figure 2

Integrated Silicon Solution, Inc. — 1-800-379-4774

5

Rev. A

03/16/06

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