IDT82P2284BB Просмотр технического описания (PDF) - Integrated Device Technology
Номер в каталоге
Компоненты Описание
производитель
IDT82P2284BB Datasheet PDF : 384 Pages
| |||
IDT82P2284
Name
TRST
TMS
TCK
TDI
TDO
VDDDIO
VDDDC
VDDAR[1]
VDDAR[2]
VDDAR[3]
VDDAR[4]
VDDAT[1]
VDDAT[2]
VDDAT[3]
VDDAT[4]
VDDAX[1]
VDDAX[2]
VDDAX[3]
VDDAX[4]
QUAD T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
Type
Input
Input
Input
Input
High-Z
Power
Power
Power
Power
Power
Pin No.
N12
R14
T14
R13
T13
E14
E15
G16
H14
H15
J15
K15
M15
M16
N16
P16
R15
H7
H8
J7
J8
J9
J10
K7
K8
K9
K10
A10
C9
A5
A4
B12
B9
B5
A3
C12
B8
B7
B2
Description
TRST: Test Reset (Active Low)
A low signal on this pin resets the JTAG test port. This pin is a Schmitt-triggered input with an internal pull-up
resistor. It must be connected to the RESET pin or ground when JTAG is not used.
TMS: Test Mode Select
The signal on this pin controls the JTAG test performance and is sampled on the rising edge of TCK. This pin
is a Schmitt-triggered input with an internal pull-up resistor.
TCK: Test Clock
The clock for the JTAG test is input on this pin. TDI and TMS are sampled on the rising edge of TCK and TDO
is clocked out of the device on the falling edge of TCK. This pin is a Schmitt-triggered input with an internal
pull-up resistor.
TDI: Test Input
The test data is sampled at this pin on the rising edge of TCK. This pin is a Schmitt-triggered input with an
internal pull-up resistor.
TDO: Test Output
The test data are output on this pin. It is updated on the falling edge of TCK. This pin is High-Z except during
the process of data scanning.
Power & Ground
VDDDIO: 3.3 V I/O Power Supply
VDDDC: 1.8 V Digital Core Power Supply
VDDAR[8:1]: 3.3 V Power Supply for Receiver
VDDAT[8:1]: 3.3 V Power Supply for Transmitter
VDDAX[8:1]: 3.3 V Power Supply for Transmit Driver
Pin Description
9
March 22, 2004
Share Link: 