IDT82P2284BB Просмотр технического описания (PDF) - Integrated Device Technology
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IDT82P2284BB Datasheet PDF : 384 Pages
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IDT82P2284
QUAD T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
Name
Type
CS
Input
A[0]
A[1]
A[2]
A[3]
A[4]
A[5]
A[6]
A[7]
A[8]
A[9]
D[0] / SDO
D[1]
D[2]
D[3]
D[4]
D[5]
D[6]
D[7]
MPM
Input
Output / Input
Input
RW / WR / SDI
Input
DS / RD / SCLK
Input
SPIEN
Input
Pin No.
N10
R5
T5
N6
P6
R6
T6
N7
P7
R7
T7
T10
N9
P9
R9
T9
T8
R8
P8
P11
P10
R10
R11
Description
CS: Chip Select (Active Low)
This pin must be asserted low to enable the microprocessor interface. The signal must be asserted high at
least once after power up to clear the internal test modes. A transition from high to low must occur on this pin
for each Read/Write operation and can not return to high until the operation is completed.
CS is a Schmitt-trigger input.
A[9:0]: Address Bus
In parallel mode, the signals on these pins select the register for the microprocessor to access.
In SPI mode, these pins should be connected to ground.
A[9:0] are Schmitt-trigger inputs.
D[7:0]: Bi-directional Data Bus
In parallel mode, the signals on these pins are the data for Read / Write operation.
In SPI mode, the D[7:1] pins should be connected to the ground through a 10 K resistor.
D[7:0] are Schmitt-trigger inputs/outputs.
SDO: Serial Data Output
In SPI mode, the data is serially output on this pin.
MPM: Micro Controller Mode
In parallel mode, set this pin low for Motorola mode or high for Intel mode.
In SPI mode, set this pin to a fixed level (high or low). This pin is useless in SPI mode.
MPM is a Schmitt-trigger input.
RW: Read / Write Select
In parallel Motorola mode, this pin is active high for read operation and active low for write operation.
WR: Write Strobe (Active Low)
In parallel Intel mode, this pin is active low for write operation.
SDI: Serial Data Input
In SPI mode, the address/control and/or data are serially input on this pin.
RW / WR / SDI is a Schmitt-trigger input.
DS: Data Strobe (Active Low)
In parallel Motorola mode, this pin is active low.
RD: Read Strobe (Active Low)
In parallel Intel mode, this pin is active low for read operation.
SCLK: Serial Clock
In SPI mode, this pin inputs the timing for the SDO and SDI pins. The signal on the SDO pin is updated on the
falling edge of SCLK, while the signal on the SDI pin is sampled on the rising edge of SCLK.
DS / RD / SCLK is a Schmitt-trigger input.
SPIEN: Serial Microprocessor Interface Enable
When this pin is low, the microprocessor interface is in parallel mode.
When this pin is high, the microprocessor interface is in SPI mode.
SPIEN is a Schmitt-trigger input.
JTAG (per IEEE 1149.1)
Pin Description
8
March 22, 2004
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