LTC1598LCG Просмотр технического описания (PDF) - Linear Technology
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LTC1598LCG
Linear Technology
LTC1598LCG Datasheet PDF : 24 Pages
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LTC1594L/LTC1598L
APPLICATIONS INFORMATION
Operation with DIN and DOUT Tied Together
The LTC1594L/LTC1598L can be operated with DIN and
DOUT tied together. This eliminates one of the lines
required to communicate to the microprocessor (MPU).
Data is transmitted in both directions on a single wire.
The processor pin connected to this data line should be
configurable as either an input or an output. The
LTC1594L/LTC1598L will take control of the data line
after CS falling and before the 6th falling CLK while the
processor takes control of the data line when CS is high
(see Figure 3). Therefore the processor port line must be
switched to an input with CS being low to avoid a conflict.
Separate Chip Selects for MUX and ADC
The LTC1594L/LTC1598L provide separate chip selects,
CSMUX and CSADC, to control MUX and ADC separately.
This feature not only provides the flexibility to select a
particular channel once for multiple conversions (see
Figure 4) but also maximizes the sample rate up to
20ksps (see Figure 5).
tsuCS
CS
1
2
3
4
5
6
CLK
DATA (DIN/DOUT)
EN
D2
D1
D0
B11
B10
•••
MPU CONTROLS DATA LINE AND SENDS
MUX ADDRESS TO LTC1594L/LTC1598L
PROCESSOR MUST RELEASE DATA
LINE AFTER CS FALLING AND
BEFORE THE 6TH FALLING CLK
LTC1594L/LTC1598L CONTROLS DATA LINE AND SENDS
A/D RESULT BACK TO MPU
LTC1594L/LTC1598L TAKES CONTROL OF DATA
LINE AFTER CS FALLING AND BEFORE THE
6TH FALLING CLK
1594L/98L F03
Figure 3. LTC1594L/LTC1598L Operation with DIN and DOUT Tied Together
CSMUX
CSADC
CLK
DIN
DOUT
CH0 TO
CH7
ADCIN =
MUXOUT
COM = GND
tsuCS
tsuCS
EN
D1
DON’T CARE
DON’T CARE
D2
D0
D0
NULL
NULL
Hi-Z
BIT
B11 B10 B9
B8
B7
B6
B5
B4
B3 B2
B1 B0
Hi-Z
BIT B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
Hi-Z
tSMPL
tCONV
tSMPL
tCONV
tON
Figure 4. Selecting a Channel Once for Multiple Conversions
1594L/98L F04
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