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FDC37C672 Просмотр технического описания (PDF) - SMSC -> Microchip

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FDC37C672
SMSC
SMSC -> Microchip SMSC
FDC37C672 Datasheet PDF : 173 Pages
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Chapter 6 Floppy Disk Controller
Enhanced Super I/O Controller with Fast IR
Datasheet
The Floppy Disk Controller (FDC) provides the interface between a host microprocessor and the floppy
disk drives. The FDC integrates the functions of the Formatter/Controller, Digital Data Separator, Write
Precompensation and Data Rate Selection logic for an IBM XT/AT compatible FDC. The true CMOS 765B
core guarantees 100% IBM PC XT/AT compatibility in addition to providing data overflow and underflow
protection.
The FDC is compatible to the 82077AA using SMSC's proprietary floppy disk controller core.
6.1
FDC Internal Registers
The Floppy Disk Controller contains eight internal registers which facilitate the interfacing between the host
microprocessor and the disk drive. Table 6.1 shows the addresses required to access these registers.
Registers other than the ones shown are not supported. The rest of the description assumes that the
primary addresses have been selected.
PRIMARY
ADDRESS
3F0
3F1
3F2
3F3
3F4
3F4
3F5
3F6
3F7
3F7
Table 6.1 - Status, Data and Control Registers
(Shown with base addresses of 3F0 and 370)
SECONDARY
ADDRESS
R/W
REGISTER
370
R
Status Register A (SRA)
371
R
Status Register B (SRB)
372
R/W Digital Output Register (DOR)
373
R/W Tape Drive Register (TSR)
374
R
Main Status Register (MSR)
374
W Data Rate Select Register (DSR)
375
R/W Data (FIFO)
376
Reserved
377
R
Digital Input Register (DIR)
377
W Configuration Control Register (CCR)
SMSC FDC37C672
Page 18
DATASHEET
Rev. 10-29-03

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