FDC37C672 Просмотр технического описания (PDF) - SMSC -> Microchip

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FDC37C672

Enhanced Super I/O Controller with Fast IR

SMSC -> Microchip 

Chapter 3

Enhanced Super I/O Controller with Fast IR

Datasheet

Description of Pin Functions

PIN NO.

QFP/TQFP

37:40,

42:45 /

35:38,

40:43

20:30 /

18:28

31 / 29

36 / 34

55 / 53

46 / 44

33 / 31

System Data Bus

NAME

TOTAL

PROCESSOR/HOST INTERFACE (34)

8

11-bit System Address Bus

11

Chip Select/SA11 (Note 3.2)

1

Address Enable

1

I/O Channel Ready

1

ISA Reset Drive

1

Serial IRQ/Parallel IRQ_3

1

32 / 30

PCI Clock for Serial IRQ (33MHz/30MHz)/ Parallel

1

IRQ_4

50 / 48

DMA Request 1

1

48 / 46

DMA Request 2

1

52 / 50

DMA Request 3/8042 P12

1

47 / 45

DMA Acknowledge 1

1

49 / 47

DMA Acknowledge 2

1

51 / 49

DMA Acknowledge 3/8042 P16

1

54 / 52

34 / 32

35 / 33

Terminal Count

I/O Read

I/O Write

19 / 17

14.318MHz Clock Input

61 / 59

62 / 60

Infrared Rx

Infrared Tx

18,53,

65,93 /

16, 51, 63,

91

7,41, 60,76 /

5, 39, 58, 74

Power

Ground

16 / 14

11 / 9

10 / 8

Read Disk Data

Write Gate

Write Disk Data

1

1

1

CLOCKS (1)

1

INFRARED INTERFACE (2)

1

1

POWER PINS (8)

FDD INTERFACE (16)

1

1

1

SYMBOL

SD[0:7]

SA[0:10]

nCS/SA11

AEN

IOCHRDY

RESET_DRV

SER_IRQ/

IRQ3

PCI_CLK/

IRQ4

DRQ1

DRQ2

DRQ3/P12

nDACK1

nDACK2

nDACK3/

P16

TC

nIOR

nIOW

CLOCKI

IRRX

IRTX

VCC

VSS

nRDATA

nWGATE

nWDATA

BUFFER

TYPE

IO24

I

I

I

OD24

IS

IO24/O24/

D24

(Note 3.1)

IO24/O24/

OD24

(Note 3.1)

O24

O24

O24/IO24

I

I

I/IO24

I

I

I

ICLK

I

O24

IS

O24/OD24

O24/OD24

SMSC FDC37C672

Page 12

DATASHEET

Rev. 10-29-03

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