DS2156 Просмотр технического описания (PDF) - Maxim Integrated

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DS2156

T1/E1/J1 Single-Chip Transceiver TDM/UTOPIA II Interface

Maxim Integrated 

Figure 2-5. Backplane Interface (TDM Backplane Enabled)

DS2156

DATA

CLOCK

SYNC

Sa BIT/FDL

EXTRACTION

SIGNALING

BUFFER

ELASTIC

STORE

CHANNEL

TIMING

RLINK

RLCLK

RSIG

RSIGFR

RSYSCLK

RSER

RCLK

RSYNC

RMSYNC

RFSYNC

RDATA

RCHCLK

RCHBLK

SYNC

DATA

CLOCK

Sa/FDL

INSERT

JACLK

ELASTIC

STORE

SIGNALING

BUFFER

CHANNEL

TIMING

TCLK

MUX

TSER

TSIG

TSSYNC

TSYSCLK

TSYNC

TESO

TDATA

TLCLK

TLINK

TCHCLK

TCHBLK

TCLK

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