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DS1220Y Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated

Номер в каталоге
Компоненты Описание
производитель
DS1220Y
Dallas
Dallas Semiconductor -> Maxim Integrated Dallas
DS1220Y Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
NOT RECOMMENDED FOR NEW DESIGNS
POWER-DOWN/POWER-UP CONDITION
DS1220Y
SEE NOTE 11
POWER-DOWN/POWER-UP TIMING
PARAMETER
SYMBOL
CE at VIH before Power-Down
tPD
VCC Slew from VTP to 0V
tF
VCC Slew from 0V to VTP
tR
CE at VIH after Power-Up
tREC
MIN
0
100
0
MAX
2
UNITS
μs
μs
μs
ms
NOTES
11
PARAMETER
Expected Data Retention Time
SYMBOL
tDR
MIN
10
MAX
(TA = +25°C)
UNITS NOTES
years
9
WARNING:
Under no circumstance are negative undershoots, of any amplitude, allowed when device is in battery
backup mode.
NOTES:
1. WE is high for a read cycle.
2. OE = VIH or VIL. If OE = VIH during a write cycle, the output buffers remain in a high impedance
state.
3. tWP is specified as the logical AND of CE and WE . tWP is measured from the latter of CE or WE
going low to the earlier of CE or WE going high.
4. tDS are measured from the earlier of CE or WE going high.
5. These parameters are sampled with a 5 pF load and are not 100% tested.
6 of 9

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