CM3202-00DE Просмотр технического описания (PDF) - California Micro Devices Corp

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CM3202-00DE

DDR VDDQ and Termination Voltage Regulator

California Micro Devices Corp 

PRELIMINARY

CM3202

Application Info (cont’d)

Adjusting VDDQ Output Voltage

The CM3202 internal bandgap reference is set at

1.25V. The VDDQ voltage is adjustable by using a resis-

tor divider, R1 and R2:

VDDQ

=

VA

D

J

×

R-----1----+-----R-----2-

R1

where VADJ = 1.25V (±-1%). For best regulator stability,

we recommend that R1 and R2 not exceed 10kΩ each.

Shutdown

ADJSD also serves as a shutdown pin. When this is

pulled high, > (VIN - 0.6V), the VDDQ output is turned

off and both source and sink MOSFET’s of the VTT reg-

ulator are set to a high impedance state. During shut-

down, the quiescent current is reduced to less than

3mA, independent of output load.

It is recommended that a 1N914 or equivalent low leak-

age diode be placed between ADJSD Pin and an

external shutdown signal to prevent interference with

the ADJ pin’s normal operation. When the diode anode

is pulled low, or left open, the CM3202 is again

enabled.

Current Limit, Foldback and Over-temperature Pro-

tection

The CM3202 features internal current limiting with ther-

mal protection. During normal operation, VDDQ limits

the output current to approximately 2A and VTT limits

the output current to approximately ±2A. When VTT is

current limiting into a hard short circuit, the output cur-

rent folds back to a lower level, about 1A, until the over-

current condition ends. While current limiting is

designed to prevent gross device failure, care should

be taken not to exceed the power dissipation ratings of

the package. If the junction temperature of the device

exceeds 170-°C (typical), the thermal protection cir-

cuitry triggers and shuts down both outputs. Once the

junction temperature has cooled to below about

120-°C, the CM3202 returns to normal operation.

Thermal Considerations

Typical Thermal Characteristics

The overall junction to ambient thermal resistance

(θJA) for device power dissipation (PD) primarily con-

sists of two paths in the series. The first path is the

junction to the case (θJC) which is defined by the pack-

age style and the second path is case to ambient (θCA)

thermal resistance which is dependent on board layout.

The final operating junction temperature for any condi-

tion can be estimated by the following thermal equa-

tion:

TJUNC = TAMB + PD × (θJC) + PD × (θCA) = TAMB + PD × (θCA)

When a CM3202 is mounted on a double-sided printed

circuit board with two square inches of copper allo-

cated for “heat spreading,” the θJA is approximately

42.5-°C/Watt for the CM3202-00DE (TDFN-8) and

85-°C/Watt for CM3202-00SM (SOIC-8). Based on the

over temperature limit of 170°C with an ambient of

85°C, the available power of the package will be:

PD(TDFN8) = 170 °C 85°C = 2W

42.5°C / W

PD(SOIC8) = 170 °C 85°C = 1W

85°C / W

PCB Layout Considerations

TheCM3202 has a heat spreader attached to the bot-

tom of the TDFN-8 package in order for the heat to be

transferred more easily from the package to the PCB.

The heat spreader is a copper pad of dimensions just

smaller than the package itself. By positioning the

matching pad on the PCB top layer to connect to the

spreader during the manufacturing, the heat will be

transferred between the two pads. See the Figure 2,

the CM3202-00DE (TDFN-8) and CM3202-00SM

(SOIC-8) show the recommended PCB layout. Please

be noted that there are six vias in the SOIC-8 package

(four vias in the TDFN-8 package) on either side to

allow the heat to dissipate into the ground and power

planes on the inner layers of the PCB. Vias can be

placed underneath the chip, but this can be resulted in

© 2006 California Micro Devices Corp. All rights reserved.

05/08/06 490 N. McCarthy Blvd., Milpitas, CA 95035-5112 l Tel: 408.263.3214 l Fax: 408.263.7846 l www.cmd.com

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