Register Direct, Two Registers Figure 11. Direct Register Addressing, Two Registers
Rd and Rr
I/O Direct
Operands are contained in register r (Rr) and d (Rd). The result is stored in register d
(Rd).
Figure 12. I/O Direct Addressing
Data Direct
Operand address is contained in 6-bits of the instruction word. n is the destination or
source register address.
Figure 13. Direct Data Addressing
31
20 19
16
OP
Rr/Rd
16 LSBs
15
0
Data Space
$0000
$085F
A 16-bit Data Address is contained in the 16 LSBs of a two-word instruction. Rd/Rr
specify the destination or source register.
14 ATmega323(L)
1457G–AVR–09/03