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ATMEGA323 Просмотр технического описания (PDF) - Atmel Corporation

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ATMEGA323 Datasheet PDF : 247 Pages
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The ALU Arithmetic
Logic Unit
The high-performance AVR ALU operates in direct connection with all the 32 general
purpose working registers. Within a single clock cycle, ALU operations between regis-
ters in the Register File are executed. The ALU operations are divided into three main
categories – arithmetic, logical, and bit-functions. ATmega323 also provides a powerful
multiplier supporting both signed/unsigned multiplication and fractional format. See the
“Instruction Set” section for a detailed description.
The In-System
Reprogrammable Flash
Program Memory
The ATmega323 contains 32K bytes On-chip In-System Reprogrammable Flash mem-
ory for program storage. Since all instructions are 16- or 32-bit words, the Flash is
organized as 16K x 16. The Flash Program memory space is divided in two sections,
Boot Program section and Application Program section.
The Flash memory has an endurance of at least 1,000 write/erase cycles. The
ATmega323 Program Counter (PC) is 14 bits wide, thus addressing the 16K Program
memory locations. The operation of Boot Program section and associated Boot Lock
bits for software protection are described in detail on page 177. See page 197 for a
detailed description on Flash data serial downloading using the SPI pins. See page 202
for details on serial downloading using the JTAG Interface.
Constant tables can be allocated within the entire Program memory address space (see
the LPM – Load Program memory instruction description).
See also page 13 for the different Program memory addressing modes.
The SRAM Data Memory
Figure 9 shows how the ATmega323 SRAM Memory is organized.
The lower 2,144 Data memory locations address the Register File, the I/O Memory, and
the internal data SRAM. The first 96 locations address the Register File + I/O Memory,
and the next 2,048 locations address the internal data SRAM.
The five different addressing modes for the Data memory cover: Direct, Indirect with
Displacement, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In
the Register File, registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode features a 63 address locations reach from the
base address given by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-
increment, the address registers X, Y, and Z are decremented and incremented.
The 32 general purpose working registers, 64 I/O Registers, and the 2,048 bytes of
internal data SRAM in the ATmega323 are all accessible through all these addressing
modes.
12 ATmega323(L)
1457G–AVR–09/03

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