ADIS16266 Просмотр технического описания (PDF) - Analog Devices
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ADIS16266 Datasheet PDF : 24 Pages
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ADIS16266
BASIC OPERATION
The ADIS16266 is an autonomous system that requires no user
initialization. As soon as it has a valid power supply, it initializes
and starts sampling, processing, and loading sensor data into
the output registers. After each sample cycle concludes, DIO1
pulses high. The SPI interface enables simple integration with
many embedded processor platforms, as shown in Figure 10
(electrical connection) and Table 5 (processor pin names and
functions).
INPUT/OUTPUT LINES ARE
VDD
COMPATIBLE WITH
3.3V OR 5V LOGIC LEVELS
5V
SYSTEM
PROCESSOR
SPI MASTER
SS
SCLK
MOSI
MISO
IRQ
16
17
VCC VCC
4 CS
ADIS16266
1 SCLK
3 DIN
2 DOUT
5 DIO1 GND GND
18
19
Figure 10. Electrical Connection Diagram
Table 5. Generic Master Processor Pin Names and Functions
Pin Name
Function
SS
Slave select
IRQ
Interrupt request
MOSI
Master output, slave input
MISO
Master input, slave output
SCLK
Serial clock
The SPI interface of the ADIS16266 supports full duplex serial
communication (simultaneous transmit and receive) and uses
the bit sequence shown in Figure 13. Table 6 provides a list of
the most common settings that require attention to initialize a
processor serial port for the SPI interface of the ADIS16266.
Data Sheet
Table 6. Generic Master Processor SPI Settings
Processor Setting Description
Master
ADIS16266 operates as a slave
SCLK Rate ≤ 2.5 MHz Maximum serial clock rate
SPI Mode 3
CPOL = 1 (polarity), CPHA = 1 (phase)
MSB First Mode
Bit sequence
16-Bit Mode
Shift register/data length
READING SENSOR DATA
A single register read requires two 16-bit SPI cycles. The first
cycle requests the contents of a register using the bit assignments
in Figure 13. Then, the register contents follow on DOUT
during the second sequence. Figure 11 includes three single
register reads in succession. In this example, the process starts with
Pin 3, DIN = 0x0400, to request the contents of the GYRO_OUT
register and follows with 0x0600 to request the contents of the
GYRO_OUT2 register and with 0x0C00 to request the contents
of the TEMP_OUT register. Full duplex operation enables
processors to use the same 16-bit SPI cycle to read data from
DOUT while requesting the next set of data on the DIN pin.
Figure 12 provides an example of the four SPI signals when
reading GYRO_OUT in a repeating pattern.
DIN
0x0400
0x0600
0x0C00
DOUT
GYRO_OUT GYRO_OUT2 TEMP_OUT
Figure 11. SPI Read Example
CS
SCLK
DIN
DIN = 0000 0100 0000 0000 = 0x0400
DOUT
DOUT = 1011 1001 1101 1010 = NEW DATA, 0x39DA = –1574 LSBs = –6,563.58°/sec
Figure 12. SPI Read Example, Second 16-Bit Sequence
CS
SCLK
DIN
R/W A6 A5 A4 A3 A2 A1 A0 DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0
R/W A6 A5
DOUT
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
D15 D14 D13
NOTES
1. DOUT BITS ARE PRODUCED ONLY WHEN THE PREVIOUS 16-BIT DIN SEQUENCE STARTS WITH R/W = 0.
2. WHEN CS IS HIGH, DOUT IS IN A THREE-STATE, HIGH IMPEDANCE MODE, WHICH ALLOWS MULTIFUNCTIONAL USE OF THE LINE
FOR OTHER DEVICES.
Figure 13. SPI Communication Bit Sequence
Rev. A | Page 10 of 24
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