AD9886 Просмотр технического описания (PDF) - Analog Devices
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AD9886 Datasheet PDF : 32 Pages
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AD9886–SPECIFICATIONS (VD = 3.3 V, VDD = 3.3 V, ADC Clock = Maximum Conversion Rate.)
Parameter
Test
AD9886KS-100
Temp Level Min
Typ Max
AD9886KS-140
Min Typ Max
RESOLUTION
8
8
DC ACCURACY
Differential Nonlinearity
Integral Nonlinearity
No Missing Codes
25°C I
Full VI
25°C I
Full VI
Full VI
± 0.5
± 0.5
Guaranteed
+1.15/–1.0
+1.15/–1.0
± 1.4
± 1.75
± 0.5 +1.25/–1.0
+1.25/–1.0
± 0.5 ± 1.65
± 2.5
Guaranteed
ANALOG INPUT
Input Voltage Range
Minimum
Maximum
Gain Tempco
Input Bias Current
Input Offset Voltage
Input Full-Scale Matching
Offset Adjustment Range
Full VI
0.5
Full VI
1.0
25°C V
135
25°C IV
1
Full IV
1
Full VI
7
50
Full VI
8.0
Full VI
44
50
56
0.5
1.0
150
1
1
7
50
8.0
44
50
56
REFERENCE OUTPUT
Output Voltage
Temperature Coefficient
Full VI
Full V
1.20 1.25 1.30
± 50
1.20 1.25 1.30
± 50
SWITCHING PERFORMANCE1
Maximum Conversion Rate
Full VI
Minimum Conversion Rate
Full IV
Data to Clock Skew, tSKEW
tBUFF
tSTAH
tDHO
tDAL
tDAH
tDSU
tSTASU
tSTOSU
HSYNC Input Frequency
Full IV
Full VI
Full VI
Full VI
Full VI
Full VI
Full VI
Full VI
Full VI
Full IV
Maximum PLL Clock Rate
Full VI
Minimum PLL Clock Rate
Full IV
PLL Jitter
25°C IV
Full IV
Sampling Phase Tempco
Full IV
100
10
–0.5
+2.0
4.7
4.0
0
4.7
4.0
250
4.7
4.0
15
110
100
12
400
7002
10002
15
140
–0.5
4.7
4.0
0
4.7
4.0
250
4.7
4.0
15
140
400
15
10
+2.0
110
12
7003
10003
DIGITAL INPUTS
Input Voltage, High (VIH)
Input Voltage, Low (VIL)
Input Current, High (VIH)
Input Current, Low (VIL)
Input Capacitance
Full VI
2.5
Full VI
0.8
Full IV
–1.0
Full IV
1.0
25°C V
3
2.5
0.8
–1.0
1.0
3
DIGITAL OUTPUTS
Output Voltage, High (VOH)
Output Voltage, Low (VOL)
Duty Cycle
DATACK, DATACK
Output Coding
Full VI
Full VI
Full IV
VD – 0.1
0.1
45
50
55
Binary
VD – 0.1
0.1
45
50
55
Binary
Unit
Bits
LSB
LSB
LSB
LSB
V p–p
V p–p
ppm/°C
µA
µA
mV
% FS
% FS
V
ppm/°C
MSPS
MSPS
ns
µs
µs
µs
µs
µs
µs
µs
µs
kHz
MHz
MHz
ps p-p
ps p-p
ps/°C
V
V
µA
µA
pF
V
V
%
–2–
REV. 0
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