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AD9848 Просмотр технического описания (PDF) - Analog Devices

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Компоненты Описание
производитель
AD9848 Datasheet PDF : 36 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
AD9848/AD9849
Address
PBLK
C5
C6
C7
C8
C9
CA
CB
CC
CD
CE
CF
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
DA
DB
DC
DD
DE
DF
E0
E1
E2
E3
E4
Bit
Content Width
[0]
1
[0]
1
[0]
1
[5:0]
6
[5:0]
6
[5:0]
6
[5:0]
6
[0]
1
[5:0]
6
[5:0]
6
[5:0]
6
[5:0]
6
[0]
1
[5:0]
6
[5:0]
6
[5:0]
6
[5:0]
6
[0]
1
[5:0]
6
[5:0]
6
[5:0]
6
[5:0]
6
0
[1:0]
2
[5:0]
6
[5:0]
6
[1:0]
2
[5:0]
6
[5:0]
6
[1:0]
2
[5:0]
6
[5:0]
6
[1:0]
2
Default
Value Register Name
Register Description
# Bits
146
01
pblkdir
PBLK Internal/External (0 = Internal, 1 = External)
00
pblkpol
PBLK External Active Polarity (0 = Low Active,
1 = High Active)
01
pblkspol0
Sequence #0: Start Polarity for PBLK
3D
pblktog1_0[5:0] Sequence #0: Toggle Position 1 for PBLK
00
pblktog1_0[11:6]
2A
pblkbtog2_0[5:0] Sequence #0: Toggle Position 2 for PBLK
06
pblkbtog2_0[11:6]
00
pblkspol1
Sequence #1: Start Polarity for PBLK
2A
pblktog1_1[5:0] Sequence #1: Toggle Position 1 for PBLK
06
pblktog1_1[11:6]
3F
pblktog2_1[5:0] Sequence #1: Toggle Position 2 for PBLK
3F
pblktog2_1[11:6]
00
pblkspol2
Sequence #2: Start Polarity for PBLK
3F
pblktog1_2[5:0] Sequence #2: Toggle Position 1 for PBLK
3F
pblktog1_2[11:6]
3F
pblktog2_2[5:0] Sequence #2: Toggle Position 2 for PBLK
3F
pblktog2_2[11:6]
01
pblkspol3
Sequence #3: Start Polarity for PBLK
3F
pblktog1_3[5:0] Sequence #3: Toggle Position 1 for PBLK
3F
pblktog1_3[11:6]
3F
pblktog2_3[5:0] Sequence #3: Toggle Position 2 for PBLK
3F
pblktog2_3[11:6]
00
pblkscp0
PBLK Sequence-Change-Position #0 (hardcoded to 0)
02
pblksptr0
PBLK Sequence Pointer for SCP #0
01
pblkscp1[5:0]
PBLK Sequence-Change-Position #1
00
pblkscp1[11:6]
01
pblksptr1
PBLK Sequence Pointer for SCP #1
02
pblkscp2[5:0]
PBLK Sequence-Change-Position #2
00
pblkscp2[11:6]
00
pblksptr2
PBLK Sequence Pointer for SCP #2
37
pblkscp3[5:0]
PBLK Sequence-Change-Position #3
03
pblkscp3[11:6]
02
pblksptr3
PBLK Sequence Pointer for SCP #3
H1–H4, RG, SHP, SHD
E5
[0]
1
E6
[5:0]
6
E7
[5:0]
6
E8
[2:0]
3
E9
[2:0]
3
EA
[2:0]
3
EB
[2:0]
3
EC
[0]
1
ED
[5:0]
6
EE
[5:0]
6
EF
[2:0]
3
F0
[5:0]
6
F1
[5:0]
6
# Bits
00
h1pol
00
h1posloc
20
h1negloc
03
h1drv
03
h2drv
03
h3drv
03
h4drv
00
rgpol
00
rgposloc
10
rgnegloc
02
rgdrv
24
shpposloc
00
shdposloc
53
H1/H2 Polarity Control (0 = No Inversion, 1 = Inversion)
H1 Positive Edge Location
H1 Negative Edge Location
H1 Drive Strength (0 = OFF, 1 = 3.5 mA, 2 = 7 mA,
3 = 10.5 mA, 4 = 14 mA, 5 = 17.5 mA, 6 = 21 mA,
7 = 24.5 mA)
H2 Drive Strength
H3 Drive Strength
H4 Drive Strength
RG Polarity Control (0 = No Inversion, 1 = Inversion)
RG Positive Edge Location
RG Negative Edge Location
RG Drive Strength (0 = OFF, 1 = 3.5 mA, 2 = 7 mA, 3 =
10.5 mA, 4 = 14 mA, 5 = 17.5 mA, 6 = 21 mA, 7 = 24.5 mA)
SHP (Positive) Edge Sampling Location
SHD (Positive) Edge Sampling Location
REV. 0
–17–

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