AD9848 Просмотр технического описания (PDF) - Analog Devices

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AD9848

CCD Signal Processors with Integrated Timing Driver

Analog Devices 

AD9848/AD9849

H1/H3

tRISE

H2/H4

tPD << tRISE

FIXED CROSSOVER VOLTAGE

tPD

H1/H3

Figure 7. H-Clock Inverse Phase Relationship

H2/H4

P[0]

CLI

1 PIXEL PERIOD

tOD

DOUT

P[12]

P[24]

P[36]

P[48] = P[0]

NOTES

1. DIGITAL OUTPUT DATA (DOUT) PHASE IS ADJUSTABLE WITH RESPECT TO THE PIXEL PERIOD.

2. WITHIN 1 CLOCK PERIOD, THE DATA TRANSITION CAN BE PROGRAMMED TO ANY OF THE 48 LOCATIONS.

Figure 8. Digital Output Phase Adjustment

REV. 0

–21–

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