CXD2931R Просмотр технического описания (PDF) - Sony Semiconductor
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CXD2931R Datasheet PDF : 23 Pages
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• External Data Access Timing (ICS0, ICS1/XROMW = 0)
(1) Read (half-word access/XROMW = 0)
CLKOUT
(a)
(b)
IADR
(c)
ICS0, ICS1
IRD
IB
(e)
(g)
(16)
(d)
(f)
(h)
(2) Write (half-word access/XROMW = 0)
CLKOUT
IADR
ICS0, ICS1
IWR
IB
(a)
(b)
(c)
(d)
(i)
(j)
(k)
(l)
(16)
CXD2931R
No.
Item
Min.
(a) Read/write cycle time (Fex: @20MHz)
—
(b) Address delay time
—
(c) Chip select fall delay time
2
(d) Chip select rise delay time
2
(e) Read signal fall delay time
1
(f) Read signal rise delay time
1
(g) Read data setup time
23
(h) Read data hold time
0
(i) Write signal fall delay time
0
(j) Write signal rise delay time
0
(k) Write data established time
—
(l) Write data hold time
5
– 15 –
Typ.
Max.
Unit
100
—
ns
—
5
ns
—
10
ns
—
9
ns
—
3
ns
—
5
ns
—
—
ns
—
—
ns
—
1
ns
—
2
ns
—
5
ns
—
—
ns
∗ The load capacitance = 30pF.
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