ATSAMA5D31A-CFU Просмотр технического описания (PDF) - Atmel Corporation
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ATSAMA5D31A-CFU Datasheet PDF : 1917 Pages
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Figure 7-1. SAMA5D3 System Controller Block Diagram
NRST
VDDBU
SHDN
WKUP
XIN32
XOUT32
XIN
XOUT
PA0–PA31
PB0–PB31
PC0–PC31
PD0–PD31
PE0–PE31
irq
fiq
periph_irq[2..42]
pit_irq
wdt_irq
dbgu_irq
pmc_irq
rstc_irq
MCK
periph_nreset
dbgu_rxd
MCK
debug
periph_nreset
SLCK
debug
idle
proc_nreset
System Controller
Advanced
Interrupt
Controller
VDDCORE Powered
nirq
irq_vect
nfiq
fiq_vect
Debug
Unit
Periodic
Interval
Timer
dbgu_irq
dbgu_txd
pit_irq
Watchdog
Timer
wdt_irq
wdt_fault
WDRPROC
por_ntrst
ntrst
proc_nreset
PCK
debug
jtag_nreset
MCK
periph_nreset
Cortex-A5
Boundary Scan
TAP Controller
Bus Matrix
VDDCORE
POR
por_ntrst
jtag_nreset
Reset
Controller
VDDBU
POR SLCK
SLCK
backup_nreset
SLCK
Real-Time
Clock
backup_nreset
rtc_alarm
Shut-Down
Controller
Slow Clock
Oscillator
32 kHz RC
Oscillator
SCKC_CR
12 MHz RC
Oscillator int
SLCK
12 MHz
Main
Oscillator
MAINCK
SMDCK
UPLL
UPLLCK
PLLA
periph_nreset
PLLACK
periph_nreset
periph_clk[5.9]
dbgu_rxd
Power
Management
Controller
PIO
Controllers
periph_nreset
proc_nreset
backup_nreset
VDDBU Powered
rtc_irq
rtc_alarm
4 General-purpose
Backup Registers
UPLLCK
UHP48M
UHP12M
periph_nreset
periph_irq[32]
USB High Speed
Host Port
UPLLCK
periph_nreset
periph_irq[33]
USB High Speed
Device Port
periph_clk[2..49]
pck[0–2]
UHP48M
UHP12M
PCK
MCK
DDR sysclk
LCD Pixel clock
pmc_irq
idle
SMDCK = periph_clk[11]
periph_irq[5..9]
irq
fiq
dbgu_txd
SMDCK
periph_nreset
periph_irq[11]
SMD
Software Modem
periph_clk[2..49]
periph_nreset
periph_irq[2..49]
in
out
enable
Embedded
Peripherals
Fuse Box
SAMA5D3 Series [DATASHEET]
35
Atmel-11121F-ATARM-SAMA5D3-Series-Datasheet_02-Feb-16
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