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MAX3544 Просмотр технического описания (PDF) - Maxim Integrated

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Компоненты Описание
производитель
MAX3544
MaximIC
Maxim Integrated MaximIC
MAX3544 Datasheet PDF : 20 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
Multiband Digital Television Tuner
Table 26. ROM Table
DESCRIPTION
BIAS
VHF-Low Tracking Filter.
VLS0, VLS1, VLP0, VLP1
VHF-High Tracking Filter.
VHS0, VHS1, VHP0, VHP1
UHF Tracking Filter.
US0, US1, UP0, UP1
IF Filter
IRHR
Reserved
ADDR MSB
DATA BYTE
0x0
Unused
0x1 VLS0[5] VLS0[4] VLS0[3] VLS0[2] VLS0[1]
0x2 VLS1[3] VLS1[2] VLS1[1] VLS1[0] VLP0[5]
0x3 VLP0[1] VLP0[0] VLP1[5] VLP1[4] VLP1[3]
0x4 VHS0[5] VHS0[4] VHS0[3] VHS0[2] VHS0[1]
0x5 VHS1[3] VHS1[2] VHS1[1] VHS1[0] VHP0[5]
0x6 VHP0[1] VHP0[0] VHP1[5] VHP1[4] VHP1[3]
0x7 US0[5] US0[4] US0[3] US0[2] US0[1]
0x8 US1[3] US1[2] US1[1] US1[0] UP0[5]
0x9 UP0[1] UP0[0] UP1[5] UP1[4] UP1[3]
0xA Unused Unused C[5]
C[4]
C[3]
0xB IRHR[7] IRHR[6] IRHR[5] IRHR[4] IRHR[3]
0xC Reserved Reserved Reserved Reserved Reserved
BIAS[3:0]
VLS0[0]
VLP0[4]
VLP1[2]
VHS0[0]
VHP0[4]
VHP1[2]
US0[0]
UP0[4]
UP1[2]
C[2]
IRHR[2]
Reserved
VLS1[5]
VLP0[3]
VLP1[1]
VHS1[5]
VHP0[3]
VHP1[1]
US1[5]
UP0[3]
UP1[1]
C[1]
IRHR[1]
Reserved
LSB
VLS1[4]
VLP0[2]
VLP1[0]
VHS1[4]
VHP0[2]
VHP1[0]
US1[4]
UP0[2]
UP1[0]
C[0]
IRHR[0]
Reserved
VCO and VCO Divider Selection
The MAX3544 frequency synthesizer includes three
VCOs with 16 sub-bands for each VCO. These VCOs
and sub-bands are selected to best center the VCO
near the operating frequency. This selection process is
performed automatically by the VAS circuitry. The Maxim
driver software seeds the VCO starting band for fastest
selection time.
In addition to VCO selection, a VCO divider value of 32,
16, 8, or 4 must be selected to provide the desired mixer
LO drive frequency. The divider is selected by VDIV in
register R00[1:0].
Reading the ROM Table
The MAX3544 includes 13 ROM registers to store fac-
tory calibration data (see Table 26). Each ROM table
entry must be read using a two-step process. First,
the address of the ROM bits to be read must be pro-
grammed into the ROM ADDR register (R0E[3:0]).
Once the address has been programmed, the data
stored in that address is automatically transferred to the
ROM READBACK register (R10[7:0]). The ROM data at
the specified address can then be read from the ROM
READBACK register and stored in the microprocessor’s
local memory. After all ROM registers have been read
and stored in the microprocessor’s local memory, ROM
ADDR must be programmed to 00 for proper operation.
Setting RF Tracking Filter Codes
The MAX3544 includes a programmable tracking filter
for each band of operation to optimize rejection of out-
of-band interference while minimizing insertion loss for
the desired received signal. The center frequency of
each tracking filter is selected by a switched-capacitor
array that is programmed by the TFS[7:0] bits in the R06
register and the TFP[5:0] bits in the R07 register.
Optimal tracking filter settings for each channel vary from
part to part due to process variations. To accommodate
part-to-part variations, each part is factory calibrated by
Maxim. During calibration the correction factors for the
series and parallel tracking capacitor arrays are calculat-
ed and written into an internal ROM table. The user must
read the ROM table upon power-up and store the data
in local memory (8 bytes total) to calculate the optimal
TFS and TFP settings for each channel. The equation for
setting TFS and TFP at each channel is available in the
device driver code provided by Maxim. Table 26 shows
the address and bits for each ROM table entry.
18   �������������������������������������������������������������������������������������

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