MAX3544 Просмотр технического описания (PDF) - Maxim Integrated
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MAX3544 Datasheet PDF : 20 Pages
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Multiband Digital Television Tuner
Table 16. R0C: PWRDET CFG2 Register—Power-Detector Configuration 2 of 2 (Address: 0Ch)
BIT NAME
EMPTY
PULLUP
BIT LOCATION
(0 = LSB)
7:3
2
RFIFD[1:0]
1:0
TYPICAL
SETTING
0000 0
0
01
Empty
Must set to 0 for proper operation
RF IF AGC diode voltage.
00 = Approximately 0.6V
01 = Approximately 0.95V
10 = Approximately 1.3V
11 = Off
FUNCTION
Table 17. R0D: FILT CF ADJ Register—IF Filter Center Frequency and BW Adjustment
(Address: 0Dh)
BIT NAME
BIT LOCATION
(0 = LSB)
TYPICAL
SETTING
FUNCTION
EMPTY
7:6
00
Empty
CFSET[5:0]
5:0
ROM
Sets the IF filter center frequency and bandwidth. For proper operation, must read
value from ROM address A[5:0] and write that value to this register.
Note: Only production tested and guaranteed functional in factory-trimmed state from ROM table. All other states are untested and
may not function correctly. Contact Maxim if untested settings will be used in production.
Table 18. R0E: ROM ADDR Register—ROM Address (Address: 0Eh)
BIT NAME
EMPTY
BIT LOCATION
(0 = LSB)
7:4
ROMA[3:0]
3:0
TYPICAL
SETTING
00
0000
FUNCTION
Empty
Address bits of the ROM register to be read or written. Must set to 0000 when not
reading the ROM table.
Table 19. R0F: IRHR Register (Address: 0Fh)
BIT NAME
BIT LOCATION
(0 = LSB)
IRHR[7:0]
7:0
TYPICAL
SETTING
ROM
FUNCTION
For proper operation, must read value from ROM address B[7:0] and write that
value to this register.
Note: Only production tested and guaranteed functional in factory-trimmed state from ROM table. All other states are untested and
may not function correctly.
Table 20. R10: ROM READBACK Register—ROM Readback (Address: 10h)
BIT NAME
BIT LOCATION
(0 = LSB)
ROMR[7:0]
7:0
TYPICAL
SETTING
N/A
FUNCTION
Data bits read from the ROM table address as specified by R0E[3:0]
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