MAX31782(2010) Просмотр технического описания (PDF) - Maxim Integrated

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MAX31782
(Rev.:2010)

System Management Microcontroller

Maxim Integrated 

System Management Microcontroller

Password

The device is programmed with a default password

prior to being shipped. The password is defined as the

16 words of physical program memory at addresses

0010h–001Fh. A single password lock bit (PWL) is

implemented in the SC register. Once a new device is

programmed, a password is defined (password is other

than all zeros or all ones) and the PWL bit is set. If the

PWL is zero, the device is deemed unprogrammed. The

password is automatically set to all ones following a

mass erase.

Stack Memory

A 16-bit, 16-level internal stack provides storage for

program return addresses and general-purpose use.

The stack is used automatically by the processor when

the CALL, RET, and RETI instructions are executed and

interrupts serviced. The stack can also be used explicitly

to store and retrieve data by using the PUSH, POP, and

POPI instructions.

On reset, the stack pointer, SP, initializes to the top of the

stack (0Fh). The CALL, PUSH, and interrupt-vectoring

operations increment SP, and then store a value at the

location pointed to by SP. The RET, RETI, POP, and POPI

operations retrieve the value at SP and then decrement SP.

Programming

The flash memory of the microcontroller can be pro-

grammed by one of three methods: in-system pro-

gramming, in-application programming, and production

programming. All three methods provide great flexibility

in system design and reduce the life-cycle cost of the

embedded system.

In-System Programming

An internal bootstrap loader allows the device to be pro-

grammed over the JTAG or I2C-compatible interfaces.

As a result, system software can be upgraded in-system,

eliminating the need for a costly hardware retrofit when

software updates are required.

Programming source select (PSS) bits in the ICDF

register determine which interface is used for bootload-

ing operation. The device supports JTAG and I2C as

an interface corresponding to 00 and 01 bits of PSS,

respectively.

In-Application Programming

The in-application programming feature allows the

microcontroller to modify its own flash program memory.

This allows on-the-fly software updates in mission-critical

applications that cannot afford downtime. Alternatively, it

allows the application to develop custom loader software

that can operate under the control of the application

software. The utility ROM contains firmware-accessible

flash programming functions that erase and program

flash memory. These functions are described in detail in

the MAXQ Family User’s Guide: MAX31782 Supplement.

System Timing

The device generates its 4MHz instruction clock (MOSC)

internally using a ring oscillator. On power-up, the output

of the oscillator (which cannot be accessed externally) is

disabled until VDD rises above VBO. Once this threshold

is reached, 1000 cycles are counted (~ 250Fs) and then

the output is enabled, clocking the device.

System Reset

The device features several sources that can be used to

reset the device.

Power-On Reset

An internal power-on-reset (POR) circuit is used to

enhance system reliability. This circuit forces the device

to perform a POR whenever a rising voltage on VDD

climbs above VPOR. When this happens the following

events occur:

• All registers and circuits enter their reset state

• The POR flag (WDCN.7) is set to indicate the source

of the reset

• Code execution begins at location 8000h when the

reset condition is released

Brownout Detect/Reset

The device features a brownout-detect/reset function.

Whenever the power monitor detects a brownout condi-

tion (when VDD < VBO), it immediately issues a reset

and stays in that state as long as VDD remains below

VBO. Once VDD voltage rises above VBO, the device

waits for tSU:MOSC before returning to normal opera-

tion, also referred to as CPU state. If a brownout occurs

during tSU:MOSC, it again goes back to the brownout

state. Otherwise, it enters into CPU state. In CPU state,

the brownout detector is also enabled. On power-up,

the device always enters into brownout state first and

then follows the previously mentioned sequence. The

reset issued by brownout is the same as POR. Whatever

action happens on POR also happens on brownout

reset. All the registers that are cleared on POR are also

cleared on brownout reset.

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