AD9911 Просмотр технического описания (PDF) - Analog Devices

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Компоненты Описание

производитель

AD9911

500 MSPS Direct Digital Synthesizer with 10-Bit DAC

Analog Devices 

AD9911

Data Sheet

Parameter

Min

DATA LATENCY (PIPELINE DELAY) SINGLE-

TONE MODE2, 3

Frequency, Phase, and Amplitude Words to

29

DAC Output with Matched Latency Enabled

Frequency Word to DAC Output with

29

Matched Latency Disabled

Phase Offset Word to DAC Output with

25

Matched Latency Disabled

Amplitude Word to DAC Output with

17

Matched Latency Disabled

DATA LATENCY (PIPELINE DELAY)

MODULATION MODE4

Frequency Word to DAC Output

34

Phase Offset Word to DAC Output

29

Amplitude Word to DAC Output

21

DATA LATENCY (PIPELINE DELAY) LINEAR

SWEEP MODE4

Frequency Rising/Falling Delta Tuning Word 41

to DAC Output

Phase Offset Rising/Falling Delta Tuning

37

Word to DAC Output

Amplitude Rising/Falling Delta Tuning Word 29

to DAC Output

Typ Max

Unit

Test Conditions/Comments

SYSCLK

cycles

SYSCLK

cycles

SYSCLK

cycles

SYSCLK

cycles

SYSCLK

Cycles

SYSCLK

Cycles

SYSCLK

Cycles

SYSCLK

Cycles

SYSCLK

Cycles

SYSCLK

Cycles

1 For the VCO frequency range of 160 MHz to 255 MHz, the appropriate setting for the VCO gain bit is dependent upon supply, temperature and process. Therefore, in a

production environment this frequency band must be avoided.

2 Data latency is reference to the I/O_UPDATE pin.

3 Data latency is fixed and the units are system clock (SYSCLK) cycles

4 Data latency is referenced to a profile change.

Rev. A | Page 8 of 41

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