FX909AD2 Просмотр технического описания (PDF) - CML Microsystems Plc

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FX909AD2

Wireless Modem Data Pump

CML Microsystems Plc 

Wireless Modem Data Pump

FX909A

1.5.4

The Programmer's View

The modem appears to the programmer as 4 write only 8-bit registers shadowed by 3 read only

registers, individual registers being selected by the A0 and A1 chip inputs:

A1 A0

00

01

10

11

Write to Modem

Data Buffer

Command Register

Control Register

Mode Register

Read from Modem

Data Buffer

Status Register

Data Quality Register

not used

1.5.4.1

Data Buffer

This is an 18-byte read/write buffer which is used to transfer data (as opposed to command, status,

mode, data quality and control information) between the modem and the host µC.

It appears to the µC as a single 8-bit register; the modem ensuring that sequential µC reads or writes

to the buffer are routed to the correct locations within the buffer.

The µC should only access this buffer when the Status Register BFREE (Buffer Free) bit is '1'.

1.5.4.2

The buffer should only be written to while in Tx mode and read from while in Rx mode (except when

loading Frame Sync detection bytes while in Rx mode).

Command Register

Writing to this register tells the modem to perform a specific action or actions, depending on the

setting of the TASK, AQLEV and AQBC bits.

When it has no action to perform (but is not 'powersaved'), the modem will be in an 'idle' state. If the

modem is in transmit mode the input to the Tx filter will be connected to VBIAS. In receive mode the

modem will continue to measure the received data quality and extract bits from the received signal,

supplying them to the de-interleave buffer, but will otherwise ignore the received data.

© 1996 Consumer Microcircuits Limited

13

D/909A/4

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