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MSM7712 Просмотр технического описания (PDF) - Oki Electric Industry

Номер в каталоге
Компоненты Описание
производитель
MSM7712
OKI
Oki Electric Industry OKI
MSM7712 Datasheet PDF : 20 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– s MSM7712 s
General Signals
General Signal Descriptions
Pin Name
SCK
VCSS, VPSS
VCDD
VPDD
Direction
Input
Power
Power
Power
Description
The system clock to the MSM7712 is provided by this pin. The clock must always be active (i.e. when reset is
asserted). The WLAN card operates synchronously to this clock.
The MSM7712 and radio operate at SCK/2. The internal modem operates at SCK (32 MHz).
The processor operates from a division of SCK (divide by 1 to divide by 8) depending on a register
(GLOB_CTL, see Programmers Reference) in the MSM7712. This signal is output as PCK.
These pins serve as ground for the core logic and I/O pads.
This pin serves as power to the core at 3-V nominal.
These pins serve as power to I/O pads and can either be 3-V or 5-V nominal.
Test
TEST mode is activated when HRST and PST2 are both active low (an illegal state) in normal operation.
The MSM7712 operates normally when TEST is not asserted. When asserted, the following test modes
are selected using processor data pins PD[1:0].
Test Select Options
PD[1] PD[0]
0
0
0
1
1
0
1
1
Test
Scan
Hi-Z
PinConn
Reserved
Description
Internal manufacturing scan test providing greater than 95% fault coverage. The scan select pin is PST0.
All output pins are set to high impedance. This test allows external tester to drive MSM7712GS-K pins.
All bidirectional, 3-state (except processor) and output pins are set to output and input pins determine state
of output pins. This test ensures connectivity of the MSM7712G-K to the PCB
MODEM SPECIFICATION
The following two subsections describe modulator and demodulator specifications.
Modulator
The MSM7712 features an internal digital 24 MHz IF CP-FSK modulator. There are two modes of modu-
lator operation:
• 1 Mbit/s, 2-ary CP-FSK
• 2 Mbit/s, 4-ary CP-FSK
Deviations can be set independently for both modes. Modes switch phase continuously in a single clock
cycle.
• 1 Mbit deviation: 1MDEV = N x 326 /4096 Hz
• 2 Mbit deviation: 2MDEV = N x 3 x 326/4096 Hz
where N=0.63.
Digital on/off ramping from 0 ~ 24 µs of the modulator output power may be added under register con-
trol
Oki Semiconductor
13

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