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ADC0809CCV Просмотр технического описания (PDF) - Micro Linear Corporation

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ADC0809CCV Datasheet PDF : 12 Pages
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May 1997
ML2258*
µP Compatible 8-Bit A/D Converter
with 8-Channel Multiplexer
GENERAL DESCRIPTION
The ML2258 combines an 8-bit A/D converter, 8-channel
analog multiplexer, and a microprocessor compatible 8-
bit parallel interface and control logic in a single
monolithic device.
Easy interface to microprocessors is provided by the
latched and decoded multiplexer address inputs and
latched three-state outputs.
The device is suitable for a wide range of applications
from process and machine control to consumer,
automotive, and telecommunication applications.
The ML2258 is an enhanced, pin-compatible, second
source for the industry standard ADC0808/ADC0809. The
ML2258 enhancements are faster conversion time, true
sample and hold function, superior power supply
rejection, wider reference range, and a double buffered
data bus as well as faster digital timing. All parameters
are guaranteed over temperature with a power supply
voltage of 5V ±10%.
BLOCK DIAGRAM
FEATURES
s Conversion time
6.6µs
s Total unadjusted error
±1/2LSB or ±1LSB
s No missing codes
s Sample and hold
390ns acquisition
s Capable of digitizing a 5V, 50kHz sine wave
s 8-input multiplexer
s 0V to 5V analog input range with single 5V
power supply
s Operates ratiometrically or with up to 5V
voltage reference
s No zero-or full-scale adjust required
s Analog input protection
25mA per input min
s Low power dissipation
3mA max
s TTL and CMOS compatible digital inputs and outputs
s Standard 28-pin DIP or surface mount PCC
s Superior pin compatible replacement for ADC0808 and
ADC0809
* Some Packages Are End Of Life As Of August 1, 2000
START CLOCK
IN0
IN1
IN2
IN3
8-CHANNEL
MULTIPLEXER
IN4
IN5
IN6
IN7
ADDR0
ADDR1
ADDR2
ADDRESS
LATCH ENABLE
ADDRESS
LATCH
AND
DECODER
A/D WITH
SAMPLE HOLD
CONTROL & TIMING
COMPARATOR
S.A.R.
SWITCH TREE
CAPACITOR/
RESISTOR
ARRAY
END OF CONVERSION
(INTERRUPT)
THREE
STATE
OUTPUT
LATCH
BUFFER
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
VCC GND +VREF
–VREF OUTPUT
ENABLE
1

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