PEB20321 Просмотр технического описания (PDF) - Infineon Technologies

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PEB20321

MUNICH32X Multichannel Network Interface Controller for HDLC

Infineon Technologies 

PEB 20321

PEF 20321

Revision History:

2001-02-14

DS2

Previous Version:

Data Sheet 1998-08-01 DS1

Page

Subjects (major changes since last revision)

Package P-TQFP-176-1 removed from User’s Manual.

47, 43

Added description of bit shift to chapter Serial PCM Core.

204

Programming examples for IOM-2 single rate clock added.

225

Renamed register bit MODE2.TSF to MODE2.TSR.

257

Changed locations of bits IMRX and IMTX in register SSCIM.

263

Register description IOMSTAT reworked.

348

Added timings for LBI Master Demultiplexed Mode

351

Added timing 19, 19A and 24B toTable 50. Changed timing 23, 25, 27, 28,

31, 24, 35A, 36A and 36C with respect to previous version of the data

sheet.

344ff

Clarified timings for usage of LRDY

plus some minor reworks.

For questions on technology, delivery and prices please contact the Infineon

Technologies Offices in Germany or the Infineon Technologies Companies and

Representatives worldwide: see our webpage at http://www.infineon.com

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