AD9048(RevF) Просмотр технического описания (PDF) - Analog Devices
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AD9048 Datasheet PDF : 8 Pages
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LAYOUT SUGGESTIONS
Designs that use the AD9048 or any other high speed device
must follow some basic layout rules to ensure optimum
performance.
The first requirement is to have a large, low impedance ground
plane under and around the converter. If the system uses separate
analog and digital grounds, both should be solidly connected
together, and to the ground plane, as closely to the AD9048 as
practical to avoid ground loop currents.
Ceramic 0.1 µF decoupling capacitors should be placed as closely
as possible to the supply pins of the AD9048. For decoupling
low frequency signals, use 10 µF tantalum capacitors also con-
nected as closely as practical to voltage supply pins.
Within the AD9048, reference currents may vary because of
coupling between the clock and input signals. As a result, it is
important that the ends of the reference ladder, RT (Pin 18) and
RB (Pin 26), be connected to low impedances (as measured
from ground).
If the AD9048 is being used in a circuit in which the reference
is not varied, a bypass capacitor to ground is strongly recom-
mended. In applications that use varying references, they must
be driven from a low impedance source.
AD9048
0.1F
AD589
–5.2V
2k⍀
10k⍀
27⍀
0.1F
1k⍀
ANALOG
INPUT
(0V TO 2V)
R
50⍀
100⍀
AD741
1k⍀
2N3906
5⍀
0.1F
R
RB
RT
43⍀
VIN
TTL
CONVERT
SIGNAL
AD9617/AD9618,
AD9620/AD9630,
AD847
AD9048
CONVERT
VEE
VCC
D1 (MSB)
D8 (LSB)
0.1F
–5.2V +5.0V
Figure 7. Typical Connections
0.1F
Step
000
001
•
•
•
127
128
129
•
•
•
254
255
Range
–2.000 V FS
7.8431 mV Step
0.0000 V
–0.0078 V
•
•
•
–0.9961 V
–1.0039 V
–1.0118 V
•
•
•
–1.9921 V
–2.0000 V
–2.0480 V FS
8.000 mV Step
0.0000 V
–0.0080 V
•
•
•
–1.0160 V
–1.0240 V
–1.0320 V
•
•
•
–2.0320 V
–2.0400 V
Table I. Truth Table
True
Binary
Inverted
NMINV = 1
NLINV = 1
00000000
00000001
•
•
•
01111111
10000000
10000001
•
•
•
11111110
11111111
0
0
11111111
11111110
•
•
•
10000000
01111111
01111110
•
•
•
00000001
00000000
Offset Twos
Complement
True
Inverted
0
1
10000000
10000001
•
•
•
11111111
00000000
00000001
•
•
•
01111110
01111111
1
0
01111111
01111110
•
•
•
00000000
11111111
11111110
•
•
•
10000001
10000000
REV. F
–7–
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