AD679JD Просмотр технического описания (PDF) - Analog Devices
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AD679JD Datasheet PDF : 12 Pages
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AD679
PIN DESCRIPTION
Symbol
28-Pin
DIP
Pin No.
44-Lead
JLCC
Pin No.
Type Name and Function
AGND
7
AIN
6
BIPOFF 10
CS
4
DGND 12, 14
DB7–DB0 26–19
EOC
27
EOCEN 1
HBE
15
OE
2
REFIN
9
REFOUT
8
SC
3
SYNC
13
VCC
11
VEE
5
VDD
28
—
16
—
17–18
11
P
10
AI
15
AI
6
DI
23
P
40, 39, 37, 36, DO
35, 34, 33, 31
42
DO
1
DI
25
DI
3
DI
14
AI
12
AO
5
DI
21
DI
17
P
8
P
43
P
U
2, 4, 7, 9, 13, U
16, 18, 19, 20,
22, 24, 26, 27,
28, 29, 30, 32,
38, 41, 44
Analog Ground. This is the ground return for AIN only.
Analog Signal Input.
Bipolar Offset. Connect to AGND for +10 V input unipolar mode and straight
binary output coding. Connect to REFOUT for ± 5 V input bipolar mode and
twos complement binary output coding.
Chip Select. Active LOW.
Digital Ground.
Data Bits. These pins provide all 14 bits in two bytes (8+6 bits). Active HIGH.
End-of-Convert. EOC goes LOW when a conversion starts and goes HIGH
when the conversion finishes. In asynchronous mode, EOC is an open drain
output and requires an external 3 kΩ pull-up resistor. See EOCEN and SYNC
pins for information on EOC gating.
End-of-Convert Enable. Enables EOC pin. Active LOW.
High Byte Enable. If LOW, output contains high byte. If HIGH, output
contains low byte (corresponding to the most recently read high byte).
Output Enable. A down-going transition on OE enables DB7–DB0. Gated with
CS. Active LOW.
Reference Input. +5 V input gives 10 V full-scale range.
+5 V Reference Output. Tied to REFIN for normal operation.
Start Convert. Active LOW. See SYNC pin for gating.
SYNC Control. If tied to VDD (synchronous mode), SC and EOCEN are gated
by CS. If tied to DGND (asynchronous mode), SC and EOCEN are indepen-
dent of CS, and EOC is an open drain output. EOC requires an external 3 kΩ
pull-up resistor in asynchronous mode.
+12 V Analog Power.
–12 V Analog Power.
+5 V Digital Power.
Tie to DGND.
These pins are unused and should be connected to DGND or VDD.
Type: AI = Analog Input. AO = Analog Output. DI = Digital Input (TTL and 5 V CMOS compatible). DO = Digital Output (TTL and 5 V CMOS compatible).
All DO pins are three-state drivers. P = Power. U = Unused.
DIP Package
PIN CONFIGURATION
JLCC Package
–6–
REV. C
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