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MAX690 Просмотр технического описания (PDF) - Maxim Integrated

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Компоненты Описание
производитель
MAX690
MaximIC
Maxim Integrated MaximIC
MAX690 Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MAX690–MAX695
Microprocessor Supervisory Circuits
Electrical Characteristics (continued)
VCC = full operating range, VBATT = 2.8V, TA = +25°C, unless otherwise noted.)
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
CHIP ENABLE GATING
CE IN Thresholds
VIL
VIH
CE IN Pullup Current
0.8
V
3.0
3
µA
CE OUT Output Voltage
CE Propagation Delay
OSCILLATOR
ISINK = 3.2mA
ISOURCE = 3.0mA
ISOURCE = 1µA, VCC = 0V
VCC = 5V
0.4
VOUT - 1.5
V
VOUT - 0.05
50
200
ns
OSC IN Input Current
±2
µA
OSC SEL Input Pullup Current
5
µA
OSC IN Frequency Range
OSC SEL = 0V
0
250
kHz
OSC IN Frequency
with External Capacitor
OSC SEL = 0V
COSC = 47pF
4
kHz
Note 1: The input voltage limits on PFI and WDI may be exceeded provided the input current is limited to less than 10mA.
Note 2: WDI is guaranteed to be in the mid-level (inactive) state if WDI is floating and VCC is in the operating voltage range. WDI is
internally biased to 38% of VCC with an impedance of approximately 125kΩ.
Pin Description
PIN
MAX690/
MAX692/
MAX694
MAX691/
MAX693/
MAX695
2
3
8
1
1
2
3
4
7
15
NAME
FUNCTION
VCC
VBATT
VOUT
GND
RESET
The +5V Input
Backup Battery Input. Connect to Ground if a backup battery is not used.
The higher of VCC or VBATT is internally switched to VOUT. Connect VOUT to VCC if
VOUT and VBATT are not used. Connect a 0.1µF or larger bypass capacitor to VOUT.
0V Ground Reference for All Signals
RESET goes low whenever VCC falls below either the reset voltage threshold or the
VBATT input voltage. The reset threshold is typically 4.65V for the MAX690/691/694/695,
and 4.4V for the MAX692 and MAX693. RESET remains low for 50ms after VCC returns
to 5V, (except 200ms in MAX694/695). RESET also goes low for 50ms if the Watchdog
Timer is enabled but not serviced within its timeout period. The RESET pulse width can
be adjusted as shown in Table 1.
Watchdog Input (WDI). WDI is a three level input. If WDI remains either high or low for
6
11
WDI
longer than the watchdog timeout period, RESET pulses low and WDO goes low. The
Watchdog Timer is disabled when WDI is left floating or is driven to mid-supply. The
timer resets with each transition at the Watchdog Timer input.
4
9
PFI
Noninverting Input to the Power-Fail Comparator. When PFI is less than 1.3V, PFO
goes low. Connect PFI to GND or VOUT when not used. See Figure 1.
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