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ADP3334(Rev0) Просмотр технического описания (PDF) - Analog Devices

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ADP3334 Datasheet PDF : 8 Pages
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ADP3334
In order to have the lowest possible sensitivity of the output
voltage to temperature variations, it is important that the paral-
lel resistance of R1 and R2 is always 50 k.
R1
R1
×
+
R2
R2
=
50
k
Also, for the best accuracy over temperature the feedback volt-
age should be set for 1.178 V:
VFB
= VOUT
×

R2
R1+ R2
where VOUT is the desired output voltage and VFB is the virtual
bandgapvoltage. Note that VFB does not actually appear at the
FB pin due to loading by the internal PTAT current.
Combining the above equations and solving for R1 and R2 gives
the following formulas:
R1 = 50 kΩ × VOUT
VFB
R2 = 50 k
1
VFB
VOUT

VOUT (V)
1.5
1.8
2.2
2.7
3.3
5
10
Table I. Feedback Resistor Selection
R1(1% Resistor) (kΩ) R2 (1% Resistor) (kΩ)
63.4
232
76.8
147
93.1
107
115
88.7
140
78.7
210
64.9
422
56.2
Thermal Overload Protection
The ADP3334 is protected against damage from excessive power
dissipation by its thermal overload protection circuit which limits
the die temperature to a maximum of 165°C. Under extreme
conditions (i.e., high ambient temperature and power dissipation)
where die temperature starts to rise above 165°C, the output
current is reduced until the die temperature has dropped to a
safe level. The output current is restored when the die tempera-
ture is reduced.
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For normal
operation, device power dissipation should be externally limited
so that junction temperatures will not exceed 150°C.
Calculating Junction Temperature
Device power dissipation is calculated as follows:
PD = (VIN VOUT) ILOAD + (VIN) IGND
Where ILOAD and IGND are load current and ground current, VIN
and VOUT are input and output voltages respectively.
Assuming ILOAD = 400 mA, IGND = 4 mA, VIN = 5.0 V and
VOUT = 2.8 V, device power dissipation is:
PD = (5 2.8) 400 mA + 5.0 (4 mA) = 900 mW
The proprietary package used in the ADP3334 has a thermal
resistance of 86.6°C/W, significantly lower than a standard
SOIC-8 package. Assuming a 4-layer board, the junction tem-
perature rise above ambient temperature will be approximately
equal to:
TJA = 0.900 W × 86.6oC /W = 77.9oC
To limit the maximum junction temperature to 150°C, maxi-
mum allowable ambient temperature will be:
TAMAX = 150°C 77.9°C/W = 72.1°C
Printed Circuit Board Layout Consideration
All surface mount packages rely on the traces of the PC board to
conduct heat away from the package.
In standard packages the dominant component of the heat resis-
tance path is the plastic between the die attach pad and the
individual leads. In typical thermally enhanced packages one or
more of the leads are fused to the die attach pad, significantly
decreasing this component. To make the improvement mean-
ingful, however, a significant copper area on the PCB must be
attached to these fused pins.
The patented thermal coastline lead frame design of the ADP3334
uniformly minimizes the value of the dominant portion of the
thermal resistance. It ensures that heat is conducted away by all
pins of the package. This yields a very low 86.6°C/W thermal
resistance for an SOIC-8 package, without any special board
layout requirements, relying only on the normal traces connected
to the leads. This yields a 15% improvement in heat dissipation
capability as compared to a standard SOIC-8 package. The
thermal resistance can be decreased by, approximately, an addi-
tional 10% by attaching a few square cm of copper area to the
IN or OUT pins of the ADP3334 package.
It is not recommended to use solder mask or silkscreen on the
PCB traces adjacent to the ADP3334s pins since it will increase
the junction-to-ambient thermal resistance of the package.
Shutdown Mode
Applying a TTL high signal to the shutdown (SD) pin or tying
it to the input pin, will turn the output OFF. Pulling SD down
to 0.4 V or below, or tying it to ground will turn the output ON.
In shutdown mode, quiescent current is reduced to much less
than 1 µA.
REV. 0
–7–

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