S-24C512C Просмотр технического описания (PDF) - Seiko Instruments Inc

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S-24C512C

2-WIRE SERIAL E2PROM

Seiko Instruments Inc 

Rev.2.0_02_S

2-WIRE SERIAL E2PROM

S-24C512C

5. Device addressing

To start communication, the master device on the system generates a start condition to the bus line. Next, the master

device sends 7-bit device address and a 1-bit read / write instruction code on to the SDA bus.

The upper 4 bits of the device address are the “Device Code”, and are fixed to “1010”.

In the S-24C512C, successive 3 bits are the “Slave Address”. These 3 bits are used to identify a device on the

system bus and is compared with the predetermined value which is defined by the address input pins (A2, A1, A0).

When the comparison result matches, the slave device responds with an acknowlede during the 9th clock cycle.

Device Code

1

0

1

0

MSB

Slave

Address

A2 A1 A0 R / W

LSB

Figure 11 Device Address

11

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